Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm MSM8974 TLMM pin controller
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8974-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     maxItems: 1
  25
  26   gpio-reserved-ranges:
  27     minItems: 1
  28     maxItems: 73
  29
  30   gpio-line-names:
  31     maxItems: 146
  32
  33 patternProperties:
  34   "-state$":
  35     oneOf:
  36       - $ref: "#/$defs/qcom-msm8974-tlmm-state"
  37       - patternProperties:
  38           "-pins$":
  39             $ref: "#/$defs/qcom-msm8974-tlmm-state"
  40         additionalProperties: false
  41
  42 $defs:
  43   qcom-msm8974-tlmm-state:
  44     type: object
  45     description:
  46       Pinctrl node's client devices use subnodes for desired pin configuration.
  47       Client device subnodes use below standard properties.
  48     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  49     unevaluatedProperties: false
  50
  51     properties:
  52       pins:
  53         description:
  54           List of gpio pins affected by the properties specified in this
  55           subnode.
  56         items:
  57           oneOf:
  58             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
  59             - enum: [ hsic_data, hsic_strobe, sdc1_clk, sdc1_cmd, sdc1_data,
  60                       sdc2_clk, sdc2_cmd, sdc2_data ]
  61         minItems: 1
  62         maxItems: 36
  63
  64       function:
  65         description:
  66           Specify the alternative function to be configured for the specified
  67           pins.
  68
  69         enum: [ gpio, cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,
  70                 blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1, blsp_uim2,
  71                 blsp_uart2, blsp_i2c2, blsp_spi2, blsp_uim3, blsp_uart3,
  72                 blsp_i2c3, blsp_spi3, blsp_uim4, blsp_uart4, blsp_i2c4,
  73                 blsp_spi4, blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,
  74                 blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6, blsp_uim7,
  75                 blsp_uart7, blsp_i2c7, blsp_spi7, blsp_uim8, blsp_uart8,
  76                 blsp_i2c8, blsp_spi8, blsp_uim9, blsp_uart9, blsp_i2c9,
  77                 blsp_spi9, blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,
  78                 blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11, blsp_uim12,
  79                 blsp_uart12, blsp_i2c12, blsp_spi12, blsp_spi1_cs1,
  80                 blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2
  81                 blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
  82                 sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0,
  83                 cci_timer1, cci_timer2, cci_timer3, cci_async_in0,
  84                 cci_async_in1, cci_async_in2, cam_mckl0, cam_mclk1, cam_mclk2,
  85                 cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, hdmi_hpd, edp_hpd,
  86                 gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, gp_mn,
  87                 tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
  88                 spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]
  89
  90     required:
  91       - pins
  92
  93     allOf:
  94       - if:
  95           properties:
  96             pins:
  97               contains:
  98                 enum:
  99                   - hsic_data
 100                   - hsic_strobe
 101           required:
 102             - pins
 103         then:
 104           properties:
 105             bias-pull-down: false
 106             bias-pull-up: false
 107             bias-disable: false
 108             drive-strength: false
 109             input-enable: false
 110             output-high: false
 111             output-low: false
 112
 113 allOf:
 114   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
 115
 116 required:
 117   - compatible
 118   - reg
 119
 120 unevaluatedProperties: false
 121
 122 examples:
 123   - |
 124     #include <dt-bindings/interrupt-controller/arm-gic.h>
 125     tlmm: pinctrl@fd510000 {
 126         compatible = "qcom,msm8974-pinctrl";
 127         reg = <0xfd510000 0x4000>;
 128         gpio-controller;
 129         gpio-ranges = <&tlmm 0 0 146>;
 130         #gpio-cells = <2>;
 131         interrupt-controller;
 132         #interrupt-cells = <2>;
 133         interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 134
 135         sdc1-off-state {
 136             clk-pins {
 137                 pins = "sdc1_clk";
 138                 bias-disable;
 139                 drive-strength = <2>;
 140             };
 141
 142             cmd-pins {
 143                 pins = "sdc1_cmd";
 144                 bias-pull-up;
 145                 drive-strength = <2>;
 146             };
 147
 148             data-pins {
 149                 pins = "sdc1_data";
 150                 bias-pull-up;
 151                 drive-strength = <2>;
 152             };
 153         };
 154
 155         blsp2-uart1-sleep-state {
 156             pins = "gpio41", "gpio42", "gpio43", "gpio44";
 157             function = "gpio";
 158             drive-strength = <2>;
 159             bias-pull-down;
 160         };
 161
 162         hsic-state {
 163             pins = "hsic_data", "hsic_strobe";
 164         };
 165     };