Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8953-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies, Inc. MSM8953 TLMM block
   8
   9 maintainers:
  10   - Bjorn Andersson <bjorn.andersson@linaro.org>
  11
  12 description: |
  13   This binding describes the Top Level Mode Multiplexer block found in the
  14   MSM8953 platform.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8953-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     description: Specifies the TLMM summary IRQ
  25     maxItems: 1
  26
  27   interrupt-controller: true
  28
  29   '#interrupt-cells':
  30     description:
  31       Specifies the PIN numbers and Flags, as defined in defined in
  32       include/dt-bindings/interrupt-controller/irq.h
  33     const: 2
  34
  35   gpio-controller: true
  36
  37   '#gpio-cells':
  38     description: Specifying the pin number and flags, as defined in
  39       include/dt-bindings/gpio/gpio.h
  40     const: 2
  41
  42   gpio-ranges:
  43     maxItems: 1
  44
  45 #PIN CONFIGURATION NODES
  46 patternProperties:
  47   '-pins$':
  48     type: object
  49     description:
  50       Pinctrl node's client devices use subnodes for desired pin configuration.
  51       Client device subnodes use below standard properties.
  52     $ref: "/schemas/pinctrl/pincfg-node.yaml"
  53
  54     properties:
  55       pins:
  56         description:
  57           List of gpio pins affected by the properties specified in this
  58           subnode.
  59         items:
  60           oneOf:
  61             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
  62             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
  63                       sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
  64                       qdsd_data1, qdsd_data2, qdsd_data3 ]
  65         minItems: 1
  66         maxItems: 16
  67
  68       function:
  69         description:
  70           Specify the alternative function to be configured for the specified
  71           pins.
  72
  73         enum: [ accel_int, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1,
  74                 atest_char, atest_char0, atest_char1, atest_char2, atest_char3,
  75                 atest_gpsadc_dtest0_native, atest_gpsadc_dtest1_native, atest_tsens,
  76                 atest_wlan0, atest_wlan1, bimc_dte0, bimc_dte1, blsp1_spi,
  77                 blsp3_spi, blsp6_spi, blsp7_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3,
  78                 blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_spi1,
  79                 blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7,
  80                 blsp_spi8, blsp_uart2, blsp_uart4, blsp_uart5, blsp_uart6, cam0_ldo,
  81                 cam1_ldo, cam1_rst, cam1_standby, cam2_rst, cam2_standby, cam3_rst,
  82                 cam3_standby, cam_irq, cam_mclk, cap_int, cci_async, cci_i2c,
  83                 cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,
  84                 cdc_pdm0, codec_int1, codec_int2, codec_reset, cri_trng, cri_trng0,
  85                 cri_trng1, dac_calib0, dac_calib1, dac_calib10, dac_calib11,
  86                 dac_calib12, dac_calib13, dac_calib14, dac_calib15, dac_calib16,
  87                 dac_calib17, dac_calib18, dac_calib19, dac_calib2, dac_calib20,
  88                 dac_calib21, dac_calib22, dac_calib23, dac_calib24, dac_calib25,
  89                 dac_calib3, dac_calib4, dac_calib5, dac_calib6, dac_calib7,
  90                 dac_calib8, dac_calib9, dbg_out, ddr_bist, dmic0_clk, dmic0_data,
  91                 ebi_cdc, ebi_ch0, ext_lpass, flash_strobe, fp_int, gcc_gp1_clk_a,
  92                 gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a,
  93                 gcc_gp3_clk_b, gcc_plltest, gcc_tlmm, gpio, gsm0_tx, gsm1_tx,
  94                 gyro_int, hall_int, hdmi_int, key_focus, key_home, key_snapshot,
  95                 key_volp, ldo_en, ldo_update, lpass_slimbus, lpass_slimbus0,
  96                 lpass_slimbus1, m_voc, mag_int, mdp_vsync, mipi_dsi0, modem_tsync,
  97                 mss_lte, nav_pps, nav_pps_in_a, nav_pps_in_b, nav_tsync,
  98                 nfc_disable, nfc_dwl, nfc_irq, ois_sync, pa_indicator, pbs0, pbs1,
  99                 pbs2, pressure_int, pri_mi2s, pri_mi2s_mclk_a, pri_mi2s_mclk_b,
 100                 pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
 101                 pwr_down, pwr_modem_enabled_a, pwr_modem_enabled_b,
 102                 pwr_nav_enabled_a, pwr_nav_enabled_b, qdss_cti_trig_in_a0,
 103                 qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,
 104                 qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,
 105                 qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b,
 106                 qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,
 107                 qdss_tracedata_b, sd_write, sdcard_det, sec_mi2s, sec_mi2s_mclk_a,
 108                 sec_mi2s_mclk_b, smb_int, ss_switch, ssbi_wtr1, ts_resout,
 109                 ts_sample, ts_xvdd, tsens_max, uim1_clk, uim1_data, uim1_present,
 110                 uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,
 111                 uim_batt, us_emitter, us_euro, wcss_bt, wcss_fm, wcss_wlan,
 112                 wcss_wlan0, wcss_wlan1, wcss_wlan2, wsa_en, wsa_io, wsa_irq ]
 113
 114       drive-strength:
 115         enum: [2, 4, 6, 8, 10, 12, 14, 16]
 116         default: 2
 117         description:
 118           Selects the drive strength for the specified pins, in mA.
 119
 120       bias-pull-down: true
 121
 122       bias-pull-up: true
 123
 124       bias-disable: true
 125
 126       output-high: true
 127
 128       output-low: true
 129
 130     required:
 131       - pins
 132       - function
 133
 134     additionalProperties: false
 135
 136 allOf:
 137   - $ref: "pinctrl.yaml#"
 138
 139 required:
 140   - compatible
 141   - reg
 142   - interrupts
 143   - interrupt-controller
 144   - '#interrupt-cells'
 145   - gpio-controller
 146   - '#gpio-cells'
 147   - gpio-ranges
 148
 149 additionalProperties: false
 150
 151 examples:
 152   - |
 153         #include <dt-bindings/interrupt-controller/arm-gic.h>
 154         tlmm: pinctrl@1000000 {
 155               compatible = "qcom,msm8953-pinctrl";
 156               reg = <0x01000000 0x300000>;
 157               interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 158               interrupt-controller;
 159               #interrupt-cells = <2>;
 160               gpio-controller;
 161               #gpio-cells = <2>;
 162               gpio-ranges = <&tlmm 0 0 142>;
 163
 164               serial_default: serial-pins {
 165                     pins = "gpio4", "gpio5";
 166                     function = "blsp_uart2";
 167                     drive-strength = <2>;
 168                     bias-disable;
 169               };
 170         };