spnego: add missing OID to oid registry
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / phy / qcom,sc8280xp-qmp-usb43dp-phy.yaml
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
8
9 maintainers:
10   - Vinod Koul <vkoul@kernel.org>
11
12 description:
13   The QMP PHY controller supports physical layer functionality for a number of
14   controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
15
16 properties:
17   compatible:
18     enum:
19       - qcom,sc8280xp-qmp-usb43dp-phy
20       - qcom,sm6350-qmp-usb3-dp-phy
21       - qcom,sm8350-qmp-usb3-dp-phy
22       - qcom,sm8450-qmp-usb3-dp-phy
23       - qcom,sm8550-qmp-usb3-dp-phy
24
25   reg:
26     maxItems: 1
27
28   clocks:
29     maxItems: 4
30
31   clock-names:
32     items:
33       - const: aux
34       - const: ref
35       - const: com_aux
36       - const: usb3_pipe
37
38   power-domains:
39     maxItems: 1
40
41   resets:
42     maxItems: 2
43
44   reset-names:
45     items:
46       - const: phy
47       - const: common
48
49   vdda-phy-supply: true
50
51   vdda-pll-supply: true
52
53   "#clock-cells":
54     const: 1
55     description:
56       See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h
57
58   "#phy-cells":
59     const: 1
60     description:
61       See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h
62
63   orientation-switch:
64     description:
65       Flag the PHY as possible handler of USB Type-C orientation switching
66     type: boolean
67
68   ports:
69     $ref: /schemas/graph.yaml#/properties/ports
70     properties:
71       port@0:
72         $ref: /schemas/graph.yaml#/properties/port
73         description: Output endpoint of the PHY
74
75       port@1:
76         $ref: /schemas/graph.yaml#/properties/port
77         description: Incoming endpoint from the USB controller
78
79       port@2:
80         $ref: /schemas/graph.yaml#/properties/port
81         description: Incoming endpoint from the DisplayPort controller
82
83 required:
84   - compatible
85   - reg
86   - clocks
87   - clock-names
88   - power-domains
89   - resets
90   - reset-names
91   - vdda-phy-supply
92   - vdda-pll-supply
93   - "#clock-cells"
94   - "#phy-cells"
95
96 additionalProperties: false
97
98 examples:
99   - |
100     #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
101
102     phy@88eb000 {
103       compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
104       reg = <0x088eb000 0x4000>;
105
106       clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
107                <&gcc GCC_USB4_EUD_CLKREF_CLK>,
108                <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
109                <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
110       clock-names = "aux", "ref", "com_aux", "usb3_pipe";
111
112       power-domains = <&gcc USB30_PRIM_GDSC>;
113
114       resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
115                <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
116       reset-names = "phy", "common";
117
118       vdda-phy-supply = <&vreg_l9d>;
119       vdda-pll-supply = <&vreg_l4d>;
120
121       orientation-switch;
122
123       #clock-cells = <1>;
124       #phy-cells = <1>;
125
126       ports {
127           #address-cells = <1>;
128           #size-cells = <0>;
129
130           port@0 {
131               reg = <0>;
132
133               endpoint {
134                   remote-endpoint = <&typec_connector_ss>;
135               };
136           };
137
138           port@1 {
139               reg = <1>;
140
141               endpoint {
142                   remote-endpoint = <&dwc3_ss_out>;
143               };
144           };
145
146           port@2 {
147               reg = <2>;
148
149               endpoint {
150                   remote-endpoint = <&mdss_dp_out>;
151               };
152           };
153       };
154     };