1 * Qualcomm PCI express root complex
5 Value type: <stringlist>
6 Definition: Value should contain
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
16 - "qcom,pcie-sm8250" for sm8250
20 Value type: <prop-encoded-array>
21 Definition: Register ranges as listed in the reg-names property
25 Value type: <stringlist>
26 Definition: Must include the following entries
27 - "parf" Qualcomm specific registers
28 - "dbi" DesignWare PCIe registers
29 - "elbi" External local bus interface registers
30 - "config" PCIe configuration space
31 - "atu" ATU address space (optional)
36 Definition: Should be "pci". As specified in designware-pcie.txt
41 Definition: Should be 3. As specified in designware-pcie.txt
46 Definition: Should be 2. As specified in designware-pcie.txt
50 Value type: <prop-encoded-array>
51 Definition: As specified in designware-pcie.txt
55 Value type: <prop-encoded-array>
56 Definition: MSI interrupt
60 Value type: <stringlist>
61 Definition: Should contain "msi"
66 Definition: Should be 1. As specified in designware-pcie.txt
70 Value type: <prop-encoded-array>
71 Definition: As specified in designware-pcie.txt
75 Value type: <prop-encoded-array>
76 Definition: As specified in designware-pcie.txt
80 Value type: <prop-encoded-array>
81 Definition: List of phandle and clock specifier pairs as listed
82 in clock-names property
86 Value type: <stringlist>
87 Definition: Should contain the following entries
88 - "iface" Configuration AHB clock
91 Usage: required for ipq/apq8064
92 Value type: <stringlist>
93 Definition: Should contain the following entries
94 - "core" Clocks the pcie hw block
95 - "phy" Clocks the pcie PHY block
96 - "aux" Clocks the pcie AUX block
97 - "ref" Clocks the pcie ref block
99 Usage: required for apq8084/ipq4019
100 Value type: <stringlist>
101 Definition: Should contain the following entries
102 - "aux" Auxiliary (AUX) clock
103 - "bus_master" Master AXI clock
104 - "bus_slave" Slave AXI clock
107 Usage: required for msm8996/apq8096
108 Value type: <stringlist>
109 Definition: Should contain the following entries
110 - "pipe" Pipe Clock driving internal logic
111 - "aux" Auxiliary (AUX) clock
112 - "cfg" Configuration clock
113 - "bus_master" Master AXI clock
114 - "bus_slave" Slave AXI clock
117 Usage: required for ipq8074
118 Value type: <stringlist>
119 Definition: Should contain the following entries
120 - "iface" PCIe to SysNOC BIU clock
121 - "axi_m" AXI Master clock
122 - "axi_s" AXI Slave clock
124 - "aux" Auxiliary clock
127 Usage: required for qcs404
128 Value type: <stringlist>
129 Definition: Should contain the following entries
131 - "aux" Auxiliary clock
132 - "master_bus" AXI Master clock
133 - "slave_bus" AXI Slave clock
136 Usage: required for sdm845 and sm8250
137 Value type: <stringlist>
138 Definition: Should contain the following entries
139 - "aux" Auxiliary clock
140 - "cfg" Configuration clock
141 - "bus_master" Master AXI clock
142 - "bus_slave" Slave AXI clock
143 - "slave_q2a" Slave Q2A clock
144 - "tbu" PCIe TBU clock
149 Value type: <prop-encoded-array>
150 Definition: List of phandle and reset specifier pairs as listed
151 in reset-names property
154 Usage: required for ipq/apq8064
155 Value type: <stringlist>
156 Definition: Should contain the following entries
164 Usage: required for apq8084
165 Value type: <stringlist>
166 Definition: Should contain the following entries
170 Usage: required for ipq/apq8064
171 Value type: <stringlist>
172 Definition: Should contain the following entries
173 - "axi_m" AXI master reset
174 - "axi_s" AXI slave reset
176 - "axi_m_vmid" VMID reset
177 - "axi_s_xpu" XPU reset
180 - "axi_m_sticky" AXI sticky reset
181 - "pipe_sticky" PIPE sticky reset
184 - "phy_ahb" PHY AHB reset
188 Usage: required for ipq8074
189 Value type: <stringlist>
190 Definition: Should contain the following entries
192 - "sleep" Sleep reset
193 - "sticky" Core Sticky reset
194 - "axi_m" AXI Master reset
195 - "axi_s" AXI Slave reset
197 - "axi_m_sticky" AXI Master Sticky reset
200 Usage: required for qcs404
201 Value type: <stringlist>
202 Definition: Should contain the following entries
203 - "axi_m" AXI Master reset
204 - "axi_s" AXI Slave reset
205 - "axi_m_sticky" AXI Master Sticky reset
206 - "pipe_sticky" PIPE sticky reset
211 Usage: required for sdm845 and sm8250
212 Value type: <stringlist>
213 Definition: Should contain the following entries
214 - "pci" PCIe core reset
217 Usage: required for apq8084 and msm8996/apq8096
218 Value type: <prop-encoded-array>
219 Definition: A phandle and power domain specifier pair to the
220 power domain which is responsible for collapsing
221 and restoring power to the peripheral
225 Value type: <phandle>
226 Definition: A phandle to the core analog power supply
229 Usage: required for ipq/apq8064
230 Value type: <phandle>
231 Definition: A phandle to the analog power supply for PHY
233 - vdda_refclk-supply:
234 Usage: required for ipq/apq8064
235 Value type: <phandle>
236 Definition: A phandle to the analog power supply for IC which generates
240 Value type: <phandle>
241 Definition: A phandle to the PCIe endpoint power supply
244 Usage: required for apq8084 and qcs404
245 Value type: <phandle>
246 Definition: List of phandle(s) as listed in phy-names property
249 Usage: required for apq8084 and qcs404
250 Value type: <stringlist>
251 Definition: Should contain "pciephy"
255 Value type: <prop-encoded-array>
256 Definition: List of phandle and GPIO specifier pairs. Should contain
257 - "perst-gpios" PCIe endpoint reset signal line
258 - "wake-gpios" PCIe endpoint wake signal line
260 * Example for ipq/apq8064
262 compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
263 reg = <0x1b500000 0x1000
266 0x0ff00000 0x100000>;
267 reg-names = "dbi", "elbi", "parf", "config";
269 linux,pci-domain = <0>;
270 bus-range = <0x00 0xff>;
272 #address-cells = <3>;
274 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */
275 0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */
276 interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
277 interrupt-names = "msi";
278 #interrupt-cells = <1>;
279 interrupt-map-mask = <0 0 0 0x7>;
280 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
281 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
282 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
283 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
284 clocks = <&gcc PCIE_A_CLK>,
288 <&gcc PCIE_ALT_REF_CLK>;
289 clock-names = "core", "iface", "phy", "aux", "ref";
290 resets = <&gcc PCIE_ACLK_RESET>,
291 <&gcc PCIE_HCLK_RESET>,
292 <&gcc PCIE_POR_RESET>,
293 <&gcc PCIE_PCI_RESET>,
294 <&gcc PCIE_PHY_RESET>,
295 <&gcc PCIE_EXT_RESET>;
296 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
297 pinctrl-0 = <&pcie_pins_default>;
298 pinctrl-names = "default";
301 * Example for apq8084
303 compatible = "qcom,pcie-apq8084", "snps,dw-pcie";
304 reg = <0xfc520000 0x2000>,
308 reg-names = "parf", "dbi", "elbi", "config";
310 linux,pci-domain = <0>;
311 bus-range = <0x00 0xff>;
313 #address-cells = <3>;
315 ranges = <0x81000000 0 0 0xff200000 0 0x00100000 /* I/O */
316 0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; /* memory */
317 interrupts = <GIC_SPI 243 IRQ_TYPE_NONE>;
318 interrupt-names = "msi";
319 #interrupt-cells = <1>;
320 interrupt-map-mask = <0 0 0 0x7>;
321 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
322 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
323 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
324 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
325 clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
326 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
327 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
328 <&gcc GCC_PCIE_0_AUX_CLK>;
329 clock-names = "iface", "master_bus", "slave_bus", "aux";
330 resets = <&gcc GCC_PCIE_0_BCR>;
331 reset-names = "core";
332 power-domains = <&gcc PCIE0_GDSC>;
333 vdda-supply = <&pma8084_l3>;
335 phy-names = "pciephy";
336 perst-gpio = <&tlmm 70 GPIO_ACTIVE_LOW>;
337 pinctrl-0 = <&pcie0_pins_default>;
338 pinctrl-names = "default";