1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car I2C Controller
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
17 - renesas,i2c-r8a7778 # R-Car M1A
18 - renesas,i2c-r8a7779 # R-Car H1
19 - const: renesas,rcar-gen1-i2c # R-Car Gen1
23 - renesas,i2c-r8a7742 # RZ/G1H
24 - renesas,i2c-r8a7743 # RZ/G1M
25 - renesas,i2c-r8a7744 # RZ/G1N
26 - renesas,i2c-r8a7745 # RZ/G1E
27 - renesas,i2c-r8a77470 # RZ/G1C
28 - renesas,i2c-r8a7790 # R-Car H2
29 - renesas,i2c-r8a7791 # R-Car M2-W
30 - renesas,i2c-r8a7792 # R-Car V2H
31 - renesas,i2c-r8a7793 # R-Car M2-N
32 - renesas,i2c-r8a7794 # R-Car E2
33 - const: renesas,rcar-gen2-i2c # R-Car Gen2 and RZ/G1
37 - renesas,i2c-r8a774a1 # RZ/G2M
38 - renesas,i2c-r8a774b1 # RZ/G2N
39 - renesas,i2c-r8a774c0 # RZ/G2E
40 - renesas,i2c-r8a774e1 # RZ/G2H
41 - renesas,i2c-r8a7795 # R-Car H3
42 - renesas,i2c-r8a7796 # R-Car M3-W
43 - renesas,i2c-r8a77961 # R-Car M3-W+
44 - renesas,i2c-r8a77965 # R-Car M3-N
45 - renesas,i2c-r8a77970 # R-Car V3M
46 - renesas,i2c-r8a77980 # R-Car V3H
47 - renesas,i2c-r8a77990 # R-Car E3
48 - renesas,i2c-r8a77995 # R-Car D3
49 - const: renesas,rcar-gen3-i2c # R-Car Gen3 and RZ/G2
53 - renesas,i2c-r8a779a0 # R-Car V3U
54 - renesas,i2c-r8a779f0 # R-Car S4-8
55 - renesas,i2c-r8a779g0 # R-Car V4H
56 - renesas,i2c-r8a779h0 # R-Car V4M
57 - const: renesas,rcar-gen4-i2c # R-Car Gen4
67 Desired I2C bus clock frequency in Hz. The absence of this property
68 indicates the default frequency 100 kHz.
83 Must contain a list of pairs of references to DMA specifiers, one for
84 transmission, and one for reception.
94 i2c-scl-falling-time-ns:
97 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
100 i2c-scl-internal-delay-ns:
103 Number of nanoseconds the IP core additionally needs to setup SCL.
105 i2c-scl-rising-time-ns:
108 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
121 - $ref: /schemas/i2c/i2c-controller.yaml#
128 - renesas,rcar-gen1-i2c
129 - renesas,rcar-gen2-i2c
140 - renesas,rcar-gen2-i2c
141 - renesas,rcar-gen3-i2c
142 - renesas,rcar-gen4-i2c
147 unevaluatedProperties: false
151 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
152 #include <dt-bindings/interrupt-controller/arm-gic.h>
153 #include <dt-bindings/power/r8a7791-sysc.h>
156 #address-cells = <1>;
158 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
159 reg = <0xe6508000 0x40>;
160 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
161 clock-frequency = <400000>;
162 clocks = <&cpg CPG_MOD 931>;
163 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
165 i2c-scl-internal-delay-ns = <6>;