Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ccorr.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Mediatek display color correction
   8
   9 maintainers:
  10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  11   - Philipp Zabel <p.zabel@pengutronix.de>
  12
  13 description: |
  14   Mediatek display color correction, namely CCORR, reproduces correct color
  15   on panels with different color gamut.
  16   CCORR device node must be siblings to the central MMSYS_CONFIG node.
  17   For a description of the MMSYS_CONFIG binding, see
  18   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  19   for details.
  20
  21 properties:
  22   compatible:
  23     oneOf:
  24       - items:
  25           - const: mediatek,mt8183-disp-ccorr
  26       - items:
  27           - const: mediatek,mt8192-disp-ccorr
  28       - items:
  29           - enum:
  30               - mediatek,mt8195-disp-ccorr
  31           - enum:
  32               - mediatek,mt8192-disp-ccorr
  33
  34   reg:
  35     maxItems: 1
  36
  37   interrupts:
  38     maxItems: 1
  39
  40   power-domains:
  41     description: A phandle and PM domain specifier as defined by bindings of
  42       the power controller specified by phandle. See
  43       Documentation/devicetree/bindings/power/power-domain.yaml for details.
  44
  45   clocks:
  46     items:
  47       - description: CCORR Clock
  48
  49   mediatek,gce-client-reg:
  50     description: The register of client driver can be configured by gce with
  51       4 arguments defined in this property, such as phandle of gce, subsys id,
  52       register offset and size. Each GCE subsys id is mapping to a client
  53       defined in the header include/dt-bindings/gce/<chip>-gce.h.
  54     $ref: /schemas/types.yaml#/definitions/phandle-array
  55     maxItems: 1
  56
  57 required:
  58   - compatible
  59   - reg
  60   - interrupts
  61   - power-domains
  62   - clocks
  63
  64 additionalProperties: false
  65
  66 examples:
  67   - |
  68     #include <dt-bindings/interrupt-controller/arm-gic.h>
  69     #include <dt-bindings/clock/mt8183-clk.h>
  70     #include <dt-bindings/power/mt8183-power.h>
  71     #include <dt-bindings/gce/mt8183-gce.h>
  72
  73     soc {
  74         #address-cells = <2>;
  75         #size-cells = <2>;
  76
  77         ccorr0: ccorr@1400f000 {
  78             compatible = "mediatek,mt8183-disp-ccorr";
  79             reg = <0 0x1400f000 0 0x1000>;
  80             interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
  81             power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
  82             clocks = <&mmsys CLK_MM_DISP_CCORR0>;
  83             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
  84         };
  85     };