Merge tag 'soc-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / fsl-lx2160a.dtsi
index e665c629e1a1f6f6bf6d38e4711f3ad47c1da0dd..96055593204ab8b5f21b039dd69fb50cb6f7d91f 100644 (file)
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
-                       scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c0_scl>;
+                       pinctrl-1 = <&i2c0_scl_gpio>;
+                       scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c1_scl>;
+                       pinctrl-1 = <&i2c1_scl_gpio>;
+                       scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c2_scl>;
+                       pinctrl-1 = <&i2c2_scl_gpio>;
+                       scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c3_scl>;
+                       pinctrl-1 = <&i2c3_scl_gpio>;
+                       scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
-                       scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c4_scl>;
+                       pinctrl-1 = <&i2c4_scl_gpio>;
+                       scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c5_scl>;
+                       pinctrl-1 = <&i2c5_scl_gpio>;
+                       scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c6_scl>;
+                       pinctrl-1 = <&i2c6_scl_gpio>;
+                       scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        clock-names = "i2c";
                        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
                                            QORIQ_CLK_PLL_DIV(16)>;
+                       pinctrl-names = "default", "gpio";
+                       pinctrl-0 = <&i2c7_scl>;
+                       pinctrl-1 = <&i2c7_scl_gpio>;
+                       scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        };
                };
 
+               pinmux_i2crv: pinmux@70010012c {
+                       compatible = "pinctrl-single";
+                       reg = <0x00000007 0x0010012c 0x0 0xc>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       pinctrl-single,bit-per-mux;
+                       pinctrl-single,register-width = <32>;
+                       pinctrl-single,function-mask = <0x7>;
+
+                       i2c1_scl: i2c1-scl-pins {
+                               pinctrl-single,bits = <0x0 0 0x7>;
+                       };
+
+                       i2c1_scl_gpio: i2c1-scl-gpio-pins {
+                               pinctrl-single,bits = <0x0 0x1 0x7>;
+                       };
+
+                       i2c2_scl: i2c2-scl-pins {
+                               pinctrl-single,bits = <0x0 0 (0x7 << 3)>;
+                       };
+
+                       i2c2_scl_gpio: i2c2-scl-gpio-pins {
+                               pinctrl-single,bits = <0x0 (0x1 << 3) (0x7 << 3)>;
+                       };
+
+                       i2c3_scl: i2c3-scl-pins {
+                               pinctrl-single,bits = <0x0 0 (0x7 << 6)>;
+                       };
+
+                       i2c3_scl_gpio: i2c3-scl-gpio-pins {
+                               pinctrl-single,bits = <0x0 (0x1 << 6) (0x7 << 6)>;
+                       };
+
+                       i2c4_scl: i2c4-scl-pins {
+                               pinctrl-single,bits = <0x0 0 (0x7 << 9)>;
+                       };
+
+                       i2c4_scl_gpio: i2c4-scl-gpio-pins {
+                               pinctrl-single,bits = <0x0 (0x1 << 9) (0x7 << 9)>;
+                       };
+
+                       i2c5_scl: i2c5-scl-pins {
+                               pinctrl-single,bits = <0x0 0 (0x7 << 12)>;
+                       };
+
+                       i2c5_scl_gpio: i2c5-scl-gpio-pins {
+                               pinctrl-single,bits = <0x0 (0x1 << 12) (0x7 << 12)>;
+                       };
+
+                       i2c6_scl: i2c6-scl-pins {
+                               pinctrl-single,bits = <0x4 0x2 0x7>;
+                       };
+
+                       i2c6_scl_gpio: i2c6-scl-gpio-pins {
+                               pinctrl-single,bits = <0x4 0x1 0x7>;
+                       };
+
+                       i2c7_scl: i2c7-scl-pins {
+                               pinctrl-single,bits = <0x4 0x2 0x7>;
+                       };
+
+                       i2c7_scl_gpio: i2c7-scl-gpio-pins {
+                               pinctrl-single,bits = <0x4 0x1 0x7>;
+                       };
+
+                       i2c0_scl: i2c0-scl-pins {
+                               pinctrl-single,bits = <0x8 0 (0x7 << 10)>;
+                       };
+
+                       i2c0_scl_gpio: i2c0-scl-gpio-pins {
+                               pinctrl-single,bits = <0x8 (0x1 << 10) (0x7 << 10)>;
+                       };
+               };
+
                fsl_mc: fsl-mc@80c000000 {
                        compatible = "fsl,qoriq-mc";
                        reg = <0x00000008 0x0c000000 0 0x40>,