1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt1318-sdw.c -- rt1318 SDCA ALSA SoC amplifier audio driver
5 // Copyright(c) 2022 Realtek Semiconductor Corp.
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/module.h>
13 #include <linux/regmap.h>
14 #include <linux/dmi.h>
15 #include <linux/firmware.h>
16 #include <sound/core.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc-dapm.h>
20 #include <sound/initval.h>
21 #include "rt1318-sdw.h"
23 static const struct reg_sequence rt1318_blind_write[] = {
162 static const struct reg_default rt1318_reg_defaults[] = {
239 { SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_UDMPU21, RT1318_SDCA_CTL_UDMPU_CLUSTER, 0), 0x00 },
240 { SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
241 { SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
242 { SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_PDE23, RT1318_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
243 { SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_CS21, RT1318_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
246 static bool rt1318_readable_register(struct device *dev, unsigned int reg)
251 case 0x3004 ... 0x3005:
252 case 0x3202 ... 0x3203:
254 case 0xc000 ... 0xc00f:
255 case 0xc120 ... 0xc125:
256 case 0xc200 ... 0xc20e:
257 case 0xc300 ... 0xc303:
258 case 0xc320 ... 0xc322:
260 case 0xc430 ... 0xc431:
261 case 0xca00 ... 0xca02:
262 case 0xca10 ... 0xca12:
263 case 0xcb00 ... 0xcb0b:
264 case 0xcc00 ... 0xcce5:
265 case 0xcd00 ... 0xcde5:
266 case 0xce00 ... 0xce6a:
267 case 0xcf00 ... 0xcf53:
268 case 0xd000 ... 0xd0cc:
269 case 0xd100 ... 0xd1b9:
270 case 0xdb00 ... 0xdc53:
271 case 0xdd00 ... 0xde53:
272 case 0xdf00 ... 0xdf6b:
274 case 0xeb00 ... 0xebcc:
275 case 0xec00 ... 0xecb9:
276 case 0xed00 ... 0xed06:
277 case 0xf010 ... 0xf014:
278 case 0xf800 ... 0xf807:
279 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_UDMPU21, RT1318_SDCA_CTL_UDMPU_CLUSTER, 0):
280 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_L):
281 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_R):
282 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_PDE23, RT1318_SDCA_CTL_REQ_POWER_STATE, 0):
283 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_CS21, RT1318_SDCA_CTL_SAMPLE_FREQ_INDEX, 0):
284 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_SAPU, RT1318_SDCA_CTL_SAPU_PROTECTION_MODE, 0):
285 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_SAPU, RT1318_SDCA_CTL_SAPU_PROTECTION_STATUS, 0):
292 static bool rt1318_volatile_register(struct device *dev, unsigned int reg)
296 case 0x3000 ... 0x3001:
300 case 0xc430 ... 0xc431:
303 case 0xdb1d ... 0xdb1f:
306 case 0xdb8a ... 0xdb92:
307 case 0xdbc5 ... 0xdbc8:
308 case 0xdc2b ... 0xdc49:
311 case 0xdd1d ... 0xdd1f:
313 case 0xdd8a ... 0xdd92:
314 case 0xddc5 ... 0xddc8:
315 case 0xde2b ... 0xde44:
316 case 0xdf4a ... 0xdf55:
317 case 0xe224 ... 0xe23b:
321 case 0xebcb ... 0xebcc:
322 case 0xed03 ... 0xed06:
323 case 0xf010 ... 0xf014:
324 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_SAPU, RT1318_SDCA_CTL_SAPU_PROTECTION_MODE, 0):
325 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_SAPU, RT1318_SDCA_CTL_SAPU_PROTECTION_STATUS, 0):
332 static const struct regmap_config rt1318_sdw_regmap = {
335 .readable_reg = rt1318_readable_register,
336 .volatile_reg = rt1318_volatile_register,
337 .max_register = 0x41081488,
338 .reg_defaults = rt1318_reg_defaults,
339 .num_reg_defaults = ARRAY_SIZE(rt1318_reg_defaults),
340 .cache_type = REGCACHE_MAPLE,
341 .use_single_read = true,
342 .use_single_write = true,
345 static int rt1318_read_prop(struct sdw_slave *slave)
347 struct sdw_slave_prop *prop = &slave->prop;
352 struct sdw_dpn_prop *dpn;
354 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
355 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
357 prop->paging_support = true;
359 /* first we need to allocate memory for set bits in port lists */
360 prop->source_ports = BIT(2);
361 prop->sink_ports = BIT(1);
363 nval = hweight32(prop->source_ports);
364 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
365 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
366 if (!prop->src_dpn_prop)
370 dpn = prop->src_dpn_prop;
371 addr = prop->source_ports;
372 for_each_set_bit(bit, &addr, 32) {
374 dpn[i].type = SDW_DPN_FULL;
375 dpn[i].simple_ch_prep_sm = true;
376 dpn[i].ch_prep_timeout = 10;
380 /* do this again for sink now */
381 nval = hweight32(prop->sink_ports);
382 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
383 sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
384 if (!prop->sink_dpn_prop)
388 dpn = prop->sink_dpn_prop;
389 addr = prop->sink_ports;
390 for_each_set_bit(bit, &addr, 32) {
392 dpn[j].type = SDW_DPN_FULL;
393 dpn[j].simple_ch_prep_sm = true;
394 dpn[j].ch_prep_timeout = 10;
398 /* set the timeout values */
399 prop->clk_stop_timeout = 20;
404 static int rt1318_io_init(struct device *dev, struct sdw_slave *slave)
406 struct rt1318_sdw_priv *rt1318 = dev_get_drvdata(dev);
411 regcache_cache_only(rt1318->regmap, false);
412 if (rt1318->first_hw_init) {
413 regcache_cache_bypass(rt1318->regmap, true);
416 * PM runtime status is marked as 'active' only when a Slave reports as Attached
418 /* update count of parent 'active' children */
419 pm_runtime_set_active(&slave->dev);
422 pm_runtime_get_noresume(&slave->dev);
425 regmap_multi_reg_write(rt1318->regmap, rt1318_blind_write,
426 ARRAY_SIZE(rt1318_blind_write));
428 if (rt1318->first_hw_init) {
429 regcache_cache_bypass(rt1318->regmap, false);
430 regcache_mark_dirty(rt1318->regmap);
433 /* Mark Slave initialization complete */
434 rt1318->first_hw_init = true;
435 rt1318->hw_init = true;
437 pm_runtime_mark_last_busy(&slave->dev);
438 pm_runtime_put_autosuspend(&slave->dev);
440 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
444 static int rt1318_update_status(struct sdw_slave *slave,
445 enum sdw_slave_status status)
447 struct rt1318_sdw_priv *rt1318 = dev_get_drvdata(&slave->dev);
449 if (status == SDW_SLAVE_UNATTACHED)
450 rt1318->hw_init = false;
453 * Perform initialization only if slave status is present and
454 * hw_init flag is false
456 if (rt1318->hw_init || status != SDW_SLAVE_ATTACHED)
459 /* perform I/O transfers required for Slave initialization */
460 return rt1318_io_init(&slave->dev, slave);
463 static int rt1318_classd_event(struct snd_soc_dapm_widget *w,
464 struct snd_kcontrol *kcontrol, int event)
466 struct snd_soc_component *component =
467 snd_soc_dapm_to_component(w->dapm);
468 struct rt1318_sdw_priv *rt1318 = snd_soc_component_get_drvdata(component);
469 unsigned char ps0 = 0x0, ps3 = 0x3;
472 case SND_SOC_DAPM_POST_PMU:
473 regmap_write(rt1318->regmap,
474 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_PDE23,
475 RT1318_SDCA_CTL_REQ_POWER_STATE, 0),
478 case SND_SOC_DAPM_PRE_PMD:
479 regmap_write(rt1318->regmap,
480 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_PDE23,
481 RT1318_SDCA_CTL_REQ_POWER_STATE, 0),
492 static const char * const rt1318_rx_data_ch_select[] = {
505 static SOC_ENUM_SINGLE_DECL(rt1318_rx_data_ch_enum,
506 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_UDMPU21, RT1318_SDCA_CTL_UDMPU_CLUSTER, 0), 0,
507 rt1318_rx_data_ch_select);
509 static const struct snd_kcontrol_new rt1318_snd_controls[] = {
511 /* UDMPU Cluster Selection */
512 SOC_ENUM("RX Channel Select", rt1318_rx_data_ch_enum),
515 static const struct snd_kcontrol_new rt1318_sto_dac =
516 SOC_DAPM_DOUBLE_R("Switch",
517 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_L),
518 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_FU21, RT1318_SDCA_CTL_FU_MUTE, CH_R),
521 static const struct snd_soc_dapm_widget rt1318_dapm_widgets[] = {
522 /* Audio Interface */
523 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Playback", 0, SND_SOC_NOPM, 0, 0),
524 SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
526 /* Digital Interface */
527 SND_SOC_DAPM_SWITCH("DAC", SND_SOC_NOPM, 0, 0, &rt1318_sto_dac),
530 SND_SOC_DAPM_PGA_E("CLASS D", SND_SOC_NOPM, 0, 0, NULL, 0,
531 rt1318_classd_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
532 SND_SOC_DAPM_OUTPUT("SPOL"),
533 SND_SOC_DAPM_OUTPUT("SPOR"),
535 SND_SOC_DAPM_PGA("FB Data", SND_SOC_NOPM, 0, 0, NULL, 0),
536 SND_SOC_DAPM_SIGGEN("FB Gen"),
539 static const struct snd_soc_dapm_route rt1318_dapm_routes[] = {
540 { "DAC", "Switch", "DP1RX" },
541 { "CLASS D", NULL, "DAC" },
542 { "SPOL", NULL, "CLASS D" },
543 { "SPOR", NULL, "CLASS D" },
545 { "FB Data", NULL, "FB Gen" },
546 { "DP2TX", NULL, "FB Data" },
549 static int rt1318_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
552 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
557 static void rt1318_sdw_shutdown(struct snd_pcm_substream *substream,
558 struct snd_soc_dai *dai)
560 snd_soc_dai_set_dma_data(dai, substream, NULL);
563 static int rt1318_sdw_hw_params(struct snd_pcm_substream *substream,
564 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
566 struct snd_soc_component *component = dai->component;
567 struct rt1318_sdw_priv *rt1318 =
568 snd_soc_component_get_drvdata(component);
569 struct sdw_stream_config stream_config;
570 struct sdw_port_config port_config;
571 enum sdw_data_direction direction;
572 struct sdw_stream_runtime *sdw_stream;
573 int retval, port, num_channels, ch_mask;
574 unsigned int sampling_rate;
576 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
577 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
582 if (!rt1318->sdw_slave)
585 /* SoundWire specific configuration */
586 /* port 1 for playback */
587 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
588 direction = SDW_DATA_DIR_RX;
591 direction = SDW_DATA_DIR_TX;
595 num_channels = params_channels(params);
596 ch_mask = (1 << num_channels) - 1;
598 stream_config.frame_rate = params_rate(params);
599 stream_config.ch_count = num_channels;
600 stream_config.bps = snd_pcm_format_width(params_format(params));
601 stream_config.direction = direction;
603 port_config.ch_mask = ch_mask;
604 port_config.num = port;
606 retval = sdw_stream_add_slave(rt1318->sdw_slave, &stream_config,
607 &port_config, 1, sdw_stream);
609 dev_err(dai->dev, "Unable to configure port\n");
613 /* sampling rate configuration */
614 switch (params_rate(params)) {
616 sampling_rate = RT1318_SDCA_RATE_16000HZ;
619 sampling_rate = RT1318_SDCA_RATE_32000HZ;
622 sampling_rate = RT1318_SDCA_RATE_44100HZ;
625 sampling_rate = RT1318_SDCA_RATE_48000HZ;
628 sampling_rate = RT1318_SDCA_RATE_96000HZ;
631 sampling_rate = RT1318_SDCA_RATE_192000HZ;
634 dev_err(component->dev, "Rate %d is not supported\n",
635 params_rate(params));
639 /* set sampling frequency */
640 regmap_write(rt1318->regmap,
641 SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1318_SDCA_ENT_CS21, RT1318_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
647 static int rt1318_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
648 struct snd_soc_dai *dai)
650 struct snd_soc_component *component = dai->component;
651 struct rt1318_sdw_priv *rt1318 =
652 snd_soc_component_get_drvdata(component);
653 struct sdw_stream_runtime *sdw_stream =
654 snd_soc_dai_get_dma_data(dai, substream);
656 if (!rt1318->sdw_slave)
659 sdw_stream_remove_slave(rt1318->sdw_slave, sdw_stream);
664 * slave_ops: callbacks for get_clock_stop_mode, clock_stop and
665 * port_prep are not defined for now
667 static const struct sdw_slave_ops rt1318_slave_ops = {
668 .read_prop = rt1318_read_prop,
669 .update_status = rt1318_update_status,
672 static int rt1318_sdw_component_probe(struct snd_soc_component *component)
675 struct rt1318_sdw_priv *rt1318 = snd_soc_component_get_drvdata(component);
677 rt1318->component = component;
679 if (!rt1318->first_hw_init)
682 ret = pm_runtime_resume(component->dev);
683 dev_dbg(&rt1318->sdw_slave->dev, "%s pm_runtime_resume, ret=%d", __func__, ret);
684 if (ret < 0 && ret != -EACCES)
690 static const struct snd_soc_component_driver soc_component_sdw_rt1318 = {
691 .probe = rt1318_sdw_component_probe,
692 .controls = rt1318_snd_controls,
693 .num_controls = ARRAY_SIZE(rt1318_snd_controls),
694 .dapm_widgets = rt1318_dapm_widgets,
695 .num_dapm_widgets = ARRAY_SIZE(rt1318_dapm_widgets),
696 .dapm_routes = rt1318_dapm_routes,
697 .num_dapm_routes = ARRAY_SIZE(rt1318_dapm_routes),
701 static const struct snd_soc_dai_ops rt1318_aif_dai_ops = {
702 .hw_params = rt1318_sdw_hw_params,
703 .hw_free = rt1318_sdw_pcm_hw_free,
704 .set_stream = rt1318_set_sdw_stream,
705 .shutdown = rt1318_sdw_shutdown,
708 #define RT1318_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
709 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
710 #define RT1318_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
711 SNDRV_PCM_FMTBIT_S32_LE)
713 static struct snd_soc_dai_driver rt1318_sdw_dai[] = {
715 .name = "rt1318-aif",
717 .stream_name = "DP1 Playback",
720 .rates = RT1318_STEREO_RATES,
721 .formats = RT1318_FORMATS,
724 .stream_name = "DP2 Capture",
727 .rates = RT1318_STEREO_RATES,
728 .formats = RT1318_FORMATS,
730 .ops = &rt1318_aif_dai_ops,
734 static int rt1318_sdw_init(struct device *dev, struct regmap *regmap,
735 struct sdw_slave *slave)
737 struct rt1318_sdw_priv *rt1318;
740 rt1318 = devm_kzalloc(dev, sizeof(*rt1318), GFP_KERNEL);
744 dev_set_drvdata(dev, rt1318);
745 rt1318->sdw_slave = slave;
746 rt1318->regmap = regmap;
748 regcache_cache_only(rt1318->regmap, true);
751 * Mark hw_init to false
752 * HW init will be performed when device reports present
754 rt1318->hw_init = false;
755 rt1318->first_hw_init = false;
757 ret = devm_snd_soc_register_component(dev,
758 &soc_component_sdw_rt1318,
760 ARRAY_SIZE(rt1318_sdw_dai));
764 /* set autosuspend parameters */
765 pm_runtime_set_autosuspend_delay(dev, 3000);
766 pm_runtime_use_autosuspend(dev);
768 /* make sure the device does not suspend immediately */
769 pm_runtime_mark_last_busy(dev);
771 pm_runtime_enable(dev);
773 /* important note: the device is NOT tagged as 'active' and will remain
774 * 'suspended' until the hardware is enumerated/initialized. This is required
775 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
776 * fail with -EACCESS because of race conditions between card creation and enumeration
779 dev_dbg(dev, "%s\n", __func__);
784 static int rt1318_sdw_probe(struct sdw_slave *slave,
785 const struct sdw_device_id *id)
787 struct regmap *regmap;
789 /* Regmap Initialization */
790 regmap = devm_regmap_init_sdw(slave, &rt1318_sdw_regmap);
792 return PTR_ERR(regmap);
794 return rt1318_sdw_init(&slave->dev, regmap, slave);
797 static int rt1318_sdw_remove(struct sdw_slave *slave)
799 pm_runtime_disable(&slave->dev);
804 static const struct sdw_device_id rt1318_id[] = {
805 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1318, 0x3, 0x1, 0),
808 MODULE_DEVICE_TABLE(sdw, rt1318_id);
810 static int __maybe_unused rt1318_dev_suspend(struct device *dev)
812 struct rt1318_sdw_priv *rt1318 = dev_get_drvdata(dev);
814 if (!rt1318->hw_init)
817 regcache_cache_only(rt1318->regmap, true);
821 #define RT1318_PROBE_TIMEOUT 5000
823 static int __maybe_unused rt1318_dev_resume(struct device *dev)
825 struct sdw_slave *slave = dev_to_sdw_dev(dev);
826 struct rt1318_sdw_priv *rt1318 = dev_get_drvdata(dev);
829 if (!rt1318->first_hw_init)
832 if (!slave->unattach_request)
835 time = wait_for_completion_timeout(&slave->initialization_complete,
836 msecs_to_jiffies(RT1318_PROBE_TIMEOUT));
838 dev_err(&slave->dev, "Initialization not complete, timed out\n");
843 slave->unattach_request = 0;
844 regcache_cache_only(rt1318->regmap, false);
845 regcache_sync(rt1318->regmap);
850 static const struct dev_pm_ops rt1318_pm = {
851 SET_SYSTEM_SLEEP_PM_OPS(rt1318_dev_suspend, rt1318_dev_resume)
852 SET_RUNTIME_PM_OPS(rt1318_dev_suspend, rt1318_dev_resume, NULL)
855 static struct sdw_driver rt1318_sdw_driver = {
857 .name = "rt1318-sdca",
858 .owner = THIS_MODULE,
861 .probe = rt1318_sdw_probe,
862 .remove = rt1318_sdw_remove,
863 .ops = &rt1318_slave_ops,
864 .id_table = rt1318_id,
866 module_sdw_driver(rt1318_sdw_driver);
868 MODULE_DESCRIPTION("ASoC RT1318 driver SDCA SDW");
869 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
870 MODULE_LICENSE("GPL");