drivers/net/wireless/intel/iwlwifi/fw/dbg.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2005-2014, 2018-2024 Intel Corporation
   4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
   5  * Copyright (C) 2015-2017 Intel Deutschland GmbH
   6  */
   7 #include <linux/devcoredump.h>
   8 #include "iwl-drv.h"
   9 #include "runtime.h"
  10 #include "dbg.h"
  11 #include "debugfs.h"
  12 #include "iwl-io.h"
  13 #include "iwl-prph.h"
  14 #include "iwl-csr.h"
  15 #include "iwl-fh.h"
  16 /**
  17  * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
  18  *
  19  * @fwrt_ptr: pointer to the buffer coming from fwrt
  20  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  21  *      transport's data.
  22  * @fwrt_len: length of the valid data in fwrt_ptr
  23  */
  24 struct iwl_fw_dump_ptrs {
  25         struct iwl_trans_dump_data *trans_ptr;
  26         void *fwrt_ptr;
  27         u32 fwrt_len;
  28 };
  29
  30 #define RADIO_REG_MAX_READ 0x2ad
  31 static void iwl_read_radio_regs(struct iwl_fw_runtime *fwrt,
  32                                 struct iwl_fw_error_dump_data **dump_data)
  33 {
  34         u8 *pos = (void *)(*dump_data)->data;
  35         int i;
  36
  37         IWL_DEBUG_INFO(fwrt, "WRT radio registers dump\n");
  38
  39         if (!iwl_trans_grab_nic_access(fwrt->trans))
  40                 return;
  41
  42         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG);
  43         (*dump_data)->len = cpu_to_le32(RADIO_REG_MAX_READ);
  44
  45         for (i = 0; i < RADIO_REG_MAX_READ; i++) {
  46                 u32 rd_cmd = RADIO_RSP_RD_CMD;
  47
  48                 rd_cmd |= i << RADIO_RSP_ADDR_POS;
  49                 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
  50                 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
  51
  52                 pos++;
  53         }
  54
  55         *dump_data = iwl_fw_error_next_data(*dump_data);
  56
  57         iwl_trans_release_nic_access(fwrt->trans);
  58 }
  59
  60 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime *fwrt,
  61                               struct iwl_fw_error_dump_data **dump_data,
  62                               int size, u32 offset, int fifo_num)
  63 {
  64         struct iwl_fw_error_dump_fifo *fifo_hdr;
  65         u32 *fifo_data;
  66         u32 fifo_len;
  67         int i;
  68
  69         fifo_hdr = (void *)(*dump_data)->data;
  70         fifo_data = (void *)fifo_hdr->data;
  71         fifo_len = size;
  72
  73         /* No need to try to read the data if the length is 0 */
  74         if (fifo_len == 0)
  75                 return;
  76
  77         /* Add a TLV for the RXF */
  78         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RXF);
  79         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
  80
  81         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
  82         fifo_hdr->available_bytes =
  83                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  84                                                 RXF_RD_D_SPACE + offset));
  85         fifo_hdr->wr_ptr =
  86                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  87                                                 RXF_RD_WR_PTR + offset));
  88         fifo_hdr->rd_ptr =
  89                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  90                                                 RXF_RD_RD_PTR + offset));
  91         fifo_hdr->fence_ptr =
  92                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  93                                                 RXF_RD_FENCE_PTR + offset));
  94         fifo_hdr->fence_mode =
  95                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
  96                                                 RXF_SET_FENCE_MODE + offset));
  97
  98         /* Lock fence */
  99         iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
 100         /* Set fence pointer to the same place like WR pointer */
 101         iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
 102         /* Set fence offset */
 103         iwl_trans_write_prph(fwrt->trans,
 104                              RXF_LD_FENCE_OFFSET_ADDR + offset, 0x0);
 105
 106         /* Read FIFO */
 107         fifo_len /= sizeof(u32); /* Size in DWORDS */
 108         for (i = 0; i < fifo_len; i++)
 109                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 110                                                  RXF_FIFO_RD_FENCE_INC +
 111                                                  offset);
 112         *dump_data = iwl_fw_error_next_data(*dump_data);
 113 }
 114
 115 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
 116                               struct iwl_fw_error_dump_data **dump_data,
 117                               int size, u32 offset, int fifo_num)
 118 {
 119         struct iwl_fw_error_dump_fifo *fifo_hdr;
 120         u32 *fifo_data;
 121         u32 fifo_len;
 122         int i;
 123
 124         fifo_hdr = (void *)(*dump_data)->data;
 125         fifo_data = (void *)fifo_hdr->data;
 126         fifo_len = size;
 127
 128         /* No need to try to read the data if the length is 0 */
 129         if (fifo_len == 0)
 130                 return;
 131
 132         /* Add a TLV for the FIFO */
 133         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_TXF);
 134         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 135
 136         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 137         fifo_hdr->available_bytes =
 138                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 139                                                 TXF_FIFO_ITEM_CNT + offset));
 140         fifo_hdr->wr_ptr =
 141                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 142                                                 TXF_WR_PTR + offset));
 143         fifo_hdr->rd_ptr =
 144                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 145                                                 TXF_RD_PTR + offset));
 146         fifo_hdr->fence_ptr =
 147                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 148                                                 TXF_FENCE_PTR + offset));
 149         fifo_hdr->fence_mode =
 150                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 151                                                 TXF_LOCK_FENCE + offset));
 152
 153         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
 154         iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
 155                              TXF_WR_PTR + offset);
 156
 157         /* Dummy-read to advance the read pointer to the head */
 158         iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
 159
 160         /* Read FIFO */
 161         for (i = 0; i < fifo_len / sizeof(u32); i++)
 162                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 163                                                   TXF_READ_MODIFY_DATA +
 164                                                   offset);
 165
 166         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
 167                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
 168                                              fifo_data, fifo_len);
 169
 170         *dump_data = iwl_fw_error_next_data(*dump_data);
 171 }
 172
 173 static void iwl_fw_dump_rxf(struct iwl_fw_runtime *fwrt,
 174                             struct iwl_fw_error_dump_data **dump_data)
 175 {
 176         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 177
 178         IWL_DEBUG_INFO(fwrt, "WRT RX FIFO dump\n");
 179
 180         if (!iwl_trans_grab_nic_access(fwrt->trans))
 181                 return;
 182
 183         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF)) {
 184                 /* Pull RXF1 */
 185                 iwl_fwrt_dump_rxf(fwrt, dump_data,
 186                                   cfg->lmac[0].rxfifo1_size, 0, 0);
 187                 /* Pull RXF2 */
 188                 iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->rxfifo2_size,
 189                                   RXF_DIFF_FROM_PREV +
 190                                   fwrt->trans->trans_cfg->umac_prph_offset, 1);
 191                 /* Pull LMAC2 RXF1 */
 192                 if (fwrt->smem_cfg.num_lmacs > 1)
 193                         iwl_fwrt_dump_rxf(fwrt, dump_data,
 194                                           cfg->lmac[1].rxfifo1_size,
 195                                           LMAC2_PRPH_OFFSET, 2);
 196         }
 197
 198         iwl_trans_release_nic_access(fwrt->trans);
 199 }
 200
 201 static void iwl_fw_dump_txf(struct iwl_fw_runtime *fwrt,
 202                             struct iwl_fw_error_dump_data **dump_data)
 203 {
 204         struct iwl_fw_error_dump_fifo *fifo_hdr;
 205         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 206         u32 *fifo_data;
 207         u32 fifo_len;
 208         int i, j;
 209
 210         IWL_DEBUG_INFO(fwrt, "WRT TX FIFO dump\n");
 211
 212         if (!iwl_trans_grab_nic_access(fwrt->trans))
 213                 return;
 214
 215         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF)) {
 216                 /* Pull TXF data from LMAC1 */
 217                 for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 218                         /* Mark the number of TXF we're pulling now */
 219                         iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
 220                         iwl_fwrt_dump_txf(fwrt, dump_data,
 221                                           cfg->lmac[0].txfifo_size[i], 0, i);
 222                 }
 223
 224                 /* Pull TXF data from LMAC2 */
 225                 if (fwrt->smem_cfg.num_lmacs > 1) {
 226                         for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries;
 227                              i++) {
 228                                 /* Mark the number of TXF we're pulling now */
 229                                 iwl_trans_write_prph(fwrt->trans,
 230                                                      TXF_LARC_NUM +
 231                                                      LMAC2_PRPH_OFFSET, i);
 232                                 iwl_fwrt_dump_txf(fwrt, dump_data,
 233                                                   cfg->lmac[1].txfifo_size[i],
 234                                                   LMAC2_PRPH_OFFSET,
 235                                                   i + cfg->num_txfifo_entries);
 236                         }
 237                 }
 238         }
 239
 240         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 241             fw_has_capa(&fwrt->fw->ucode_capa,
 242                         IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 243                 /* Pull UMAC internal TXF data from all TXFs */
 244                 for (i = 0;
 245                      i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
 246                      i++) {
 247                         fifo_hdr = (void *)(*dump_data)->data;
 248                         fifo_data = (void *)fifo_hdr->data;
 249                         fifo_len = fwrt->smem_cfg.internal_txfifo_size[i];
 250
 251                         /* No need to try to read the data if the length is 0 */
 252                         if (fifo_len == 0)
 253                                 continue;
 254
 255                         /* Add a TLV for the internal FIFOs */
 256                         (*dump_data)->type =
 257                                 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF);
 258                         (*dump_data)->len =
 259                                 cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 260
 261                         fifo_hdr->fifo_num = cpu_to_le32(i);
 262
 263                         /* Mark the number of TXF we're pulling now */
 264                         iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
 265                                 fwrt->smem_cfg.num_txfifo_entries);
 266
 267                         fifo_hdr->available_bytes =
 268                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 269                                                                 TXF_CPU2_FIFO_ITEM_CNT));
 270                         fifo_hdr->wr_ptr =
 271                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 272                                                                 TXF_CPU2_WR_PTR));
 273                         fifo_hdr->rd_ptr =
 274                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 275                                                                 TXF_CPU2_RD_PTR));
 276                         fifo_hdr->fence_ptr =
 277                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 278                                                                 TXF_CPU2_FENCE_PTR));
 279                         fifo_hdr->fence_mode =
 280                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 281                                                                 TXF_CPU2_LOCK_FENCE));
 282
 283                         /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
 284                         iwl_trans_write_prph(fwrt->trans,
 285                                              TXF_CPU2_READ_MODIFY_ADDR,
 286                                              TXF_CPU2_WR_PTR);
 287
 288                         /* Dummy-read to advance the read pointer to head */
 289                         iwl_trans_read_prph(fwrt->trans,
 290                                             TXF_CPU2_READ_MODIFY_DATA);
 291
 292                         /* Read FIFO */
 293                         fifo_len /= sizeof(u32); /* Size in DWORDS */
 294                         for (j = 0; j < fifo_len; j++)
 295                                 fifo_data[j] =
 296                                         iwl_trans_read_prph(fwrt->trans,
 297                                                             TXF_CPU2_READ_MODIFY_DATA);
 298                         *dump_data = iwl_fw_error_next_data(*dump_data);
 299                 }
 300         }
 301
 302         iwl_trans_release_nic_access(fwrt->trans);
 303 }
 304
 305 struct iwl_prph_range {
 306         u32 start, end;
 307 };
 308
 309 static const struct iwl_prph_range iwl_prph_dump_addr_comm[] = {
 310         { .start = 0x00a00000, .end = 0x00a00000 },
 311         { .start = 0x00a0000c, .end = 0x00a00024 },
 312         { .start = 0x00a0002c, .end = 0x00a0003c },
 313         { .start = 0x00a00410, .end = 0x00a00418 },
 314         { .start = 0x00a00420, .end = 0x00a00420 },
 315         { .start = 0x00a00428, .end = 0x00a00428 },
 316         { .start = 0x00a00430, .end = 0x00a0043c },
 317         { .start = 0x00a00444, .end = 0x00a00444 },
 318         { .start = 0x00a004c0, .end = 0x00a004cc },
 319         { .start = 0x00a004d8, .end = 0x00a004d8 },
 320         { .start = 0x00a004e0, .end = 0x00a004f0 },
 321         { .start = 0x00a00840, .end = 0x00a00840 },
 322         { .start = 0x00a00850, .end = 0x00a00858 },
 323         { .start = 0x00a01004, .end = 0x00a01008 },
 324         { .start = 0x00a01010, .end = 0x00a01010 },
 325         { .start = 0x00a01018, .end = 0x00a01018 },
 326         { .start = 0x00a01024, .end = 0x00a01024 },
 327         { .start = 0x00a0102c, .end = 0x00a01034 },
 328         { .start = 0x00a0103c, .end = 0x00a01040 },
 329         { .start = 0x00a01048, .end = 0x00a01094 },
 330         { .start = 0x00a01c00, .end = 0x00a01c20 },
 331         { .start = 0x00a01c58, .end = 0x00a01c58 },
 332         { .start = 0x00a01c7c, .end = 0x00a01c7c },
 333         { .start = 0x00a01c28, .end = 0x00a01c54 },
 334         { .start = 0x00a01c5c, .end = 0x00a01c5c },
 335         { .start = 0x00a01c60, .end = 0x00a01cdc },
 336         { .start = 0x00a01ce0, .end = 0x00a01d0c },
 337         { .start = 0x00a01d18, .end = 0x00a01d20 },
 338         { .start = 0x00a01d2c, .end = 0x00a01d30 },
 339         { .start = 0x00a01d40, .end = 0x00a01d5c },
 340         { .start = 0x00a01d80, .end = 0x00a01d80 },
 341         { .start = 0x00a01d98, .end = 0x00a01d9c },
 342         { .start = 0x00a01da8, .end = 0x00a01da8 },
 343         { .start = 0x00a01db8, .end = 0x00a01df4 },
 344         { .start = 0x00a01dc0, .end = 0x00a01dfc },
 345         { .start = 0x00a01e00, .end = 0x00a01e2c },
 346         { .start = 0x00a01e40, .end = 0x00a01e60 },
 347         { .start = 0x00a01e68, .end = 0x00a01e6c },
 348         { .start = 0x00a01e74, .end = 0x00a01e74 },
 349         { .start = 0x00a01e84, .end = 0x00a01e90 },
 350         { .start = 0x00a01e9c, .end = 0x00a01ec4 },
 351         { .start = 0x00a01ed0, .end = 0x00a01ee0 },
 352         { .start = 0x00a01f00, .end = 0x00a01f1c },
 353         { .start = 0x00a01f44, .end = 0x00a01ffc },
 354         { .start = 0x00a02000, .end = 0x00a02048 },
 355         { .start = 0x00a02068, .end = 0x00a020f0 },
 356         { .start = 0x00a02100, .end = 0x00a02118 },
 357         { .start = 0x00a02140, .end = 0x00a0214c },
 358         { .start = 0x00a02168, .end = 0x00a0218c },
 359         { .start = 0x00a021c0, .end = 0x00a021c0 },
 360         { .start = 0x00a02400, .end = 0x00a02410 },
 361         { .start = 0x00a02418, .end = 0x00a02420 },
 362         { .start = 0x00a02428, .end = 0x00a0242c },
 363         { .start = 0x00a02434, .end = 0x00a02434 },
 364         { .start = 0x00a02440, .end = 0x00a02460 },
 365         { .start = 0x00a02468, .end = 0x00a024b0 },
 366         { .start = 0x00a024c8, .end = 0x00a024cc },
 367         { .start = 0x00a02500, .end = 0x00a02504 },
 368         { .start = 0x00a0250c, .end = 0x00a02510 },
 369         { .start = 0x00a02540, .end = 0x00a02554 },
 370         { .start = 0x00a02580, .end = 0x00a025f4 },
 371         { .start = 0x00a02600, .end = 0x00a0260c },
 372         { .start = 0x00a02648, .end = 0x00a02650 },
 373         { .start = 0x00a02680, .end = 0x00a02680 },
 374         { .start = 0x00a026c0, .end = 0x00a026d0 },
 375         { .start = 0x00a02700, .end = 0x00a0270c },
 376         { .start = 0x00a02804, .end = 0x00a02804 },
 377         { .start = 0x00a02818, .end = 0x00a0281c },
 378         { .start = 0x00a02c00, .end = 0x00a02db4 },
 379         { .start = 0x00a02df4, .end = 0x00a02fb0 },
 380         { .start = 0x00a03000, .end = 0x00a03014 },
 381         { .start = 0x00a0301c, .end = 0x00a0302c },
 382         { .start = 0x00a03034, .end = 0x00a03038 },
 383         { .start = 0x00a03040, .end = 0x00a03048 },
 384         { .start = 0x00a03060, .end = 0x00a03068 },
 385         { .start = 0x00a03070, .end = 0x00a03074 },
 386         { .start = 0x00a0307c, .end = 0x00a0307c },
 387         { .start = 0x00a03080, .end = 0x00a03084 },
 388         { .start = 0x00a0308c, .end = 0x00a03090 },
 389         { .start = 0x00a03098, .end = 0x00a03098 },
 390         { .start = 0x00a030a0, .end = 0x00a030a0 },
 391         { .start = 0x00a030a8, .end = 0x00a030b4 },
 392         { .start = 0x00a030bc, .end = 0x00a030bc },
 393         { .start = 0x00a030c0, .end = 0x00a0312c },
 394         { .start = 0x00a03c00, .end = 0x00a03c5c },
 395         { .start = 0x00a04400, .end = 0x00a04454 },
 396         { .start = 0x00a04460, .end = 0x00a04474 },
 397         { .start = 0x00a044c0, .end = 0x00a044ec },
 398         { .start = 0x00a04500, .end = 0x00a04504 },
 399         { .start = 0x00a04510, .end = 0x00a04538 },
 400         { .start = 0x00a04540, .end = 0x00a04548 },
 401         { .start = 0x00a04560, .end = 0x00a0457c },
 402         { .start = 0x00a04590, .end = 0x00a04598 },
 403         { .start = 0x00a045c0, .end = 0x00a045f4 },
 404 };
 405
 406 static const struct iwl_prph_range iwl_prph_dump_addr_9000[] = {
 407         { .start = 0x00a05c00, .end = 0x00a05c18 },
 408         { .start = 0x00a05400, .end = 0x00a056e8 },
 409         { .start = 0x00a08000, .end = 0x00a098bc },
 410         { .start = 0x00a02400, .end = 0x00a02758 },
 411         { .start = 0x00a04764, .end = 0x00a0476c },
 412         { .start = 0x00a04770, .end = 0x00a04774 },
 413         { .start = 0x00a04620, .end = 0x00a04624 },
 414 };
 415
 416 static const struct iwl_prph_range iwl_prph_dump_addr_22000[] = {
 417         { .start = 0x00a00000, .end = 0x00a00000 },
 418         { .start = 0x00a0000c, .end = 0x00a00024 },
 419         { .start = 0x00a0002c, .end = 0x00a00034 },
 420         { .start = 0x00a0003c, .end = 0x00a0003c },
 421         { .start = 0x00a00410, .end = 0x00a00418 },
 422         { .start = 0x00a00420, .end = 0x00a00420 },
 423         { .start = 0x00a00428, .end = 0x00a00428 },
 424         { .start = 0x00a00430, .end = 0x00a0043c },
 425         { .start = 0x00a00444, .end = 0x00a00444 },
 426         { .start = 0x00a00840, .end = 0x00a00840 },
 427         { .start = 0x00a00850, .end = 0x00a00858 },
 428         { .start = 0x00a01004, .end = 0x00a01008 },
 429         { .start = 0x00a01010, .end = 0x00a01010 },
 430         { .start = 0x00a01018, .end = 0x00a01018 },
 431         { .start = 0x00a01024, .end = 0x00a01024 },
 432         { .start = 0x00a0102c, .end = 0x00a01034 },
 433         { .start = 0x00a0103c, .end = 0x00a01040 },
 434         { .start = 0x00a01048, .end = 0x00a01050 },
 435         { .start = 0x00a01058, .end = 0x00a01058 },
 436         { .start = 0x00a01060, .end = 0x00a01070 },
 437         { .start = 0x00a0108c, .end = 0x00a0108c },
 438         { .start = 0x00a01c20, .end = 0x00a01c28 },
 439         { .start = 0x00a01d10, .end = 0x00a01d10 },
 440         { .start = 0x00a01e28, .end = 0x00a01e2c },
 441         { .start = 0x00a01e60, .end = 0x00a01e60 },
 442         { .start = 0x00a01e80, .end = 0x00a01e80 },
 443         { .start = 0x00a01ea0, .end = 0x00a01ea0 },
 444         { .start = 0x00a02000, .end = 0x00a0201c },
 445         { .start = 0x00a02024, .end = 0x00a02024 },
 446         { .start = 0x00a02040, .end = 0x00a02048 },
 447         { .start = 0x00a020c0, .end = 0x00a020e0 },
 448         { .start = 0x00a02400, .end = 0x00a02404 },
 449         { .start = 0x00a0240c, .end = 0x00a02414 },
 450         { .start = 0x00a0241c, .end = 0x00a0243c },
 451         { .start = 0x00a02448, .end = 0x00a024bc },
 452         { .start = 0x00a024c4, .end = 0x00a024cc },
 453         { .start = 0x00a02508, .end = 0x00a02508 },
 454         { .start = 0x00a02510, .end = 0x00a02514 },
 455         { .start = 0x00a0251c, .end = 0x00a0251c },
 456         { .start = 0x00a0252c, .end = 0x00a0255c },
 457         { .start = 0x00a02564, .end = 0x00a025a0 },
 458         { .start = 0x00a025a8, .end = 0x00a025b4 },
 459         { .start = 0x00a025c0, .end = 0x00a025c0 },
 460         { .start = 0x00a025e8, .end = 0x00a025f4 },
 461         { .start = 0x00a02c08, .end = 0x00a02c18 },
 462         { .start = 0x00a02c2c, .end = 0x00a02c38 },
 463         { .start = 0x00a02c68, .end = 0x00a02c78 },
 464         { .start = 0x00a03000, .end = 0x00a03000 },
 465         { .start = 0x00a03010, .end = 0x00a03014 },
 466         { .start = 0x00a0301c, .end = 0x00a0302c },
 467         { .start = 0x00a03034, .end = 0x00a03038 },
 468         { .start = 0x00a03040, .end = 0x00a03044 },
 469         { .start = 0x00a03060, .end = 0x00a03068 },
 470         { .start = 0x00a03070, .end = 0x00a03070 },
 471         { .start = 0x00a0307c, .end = 0x00a03084 },
 472         { .start = 0x00a0308c, .end = 0x00a03090 },
 473         { .start = 0x00a03098, .end = 0x00a03098 },
 474         { .start = 0x00a030a0, .end = 0x00a030a0 },
 475         { .start = 0x00a030a8, .end = 0x00a030b4 },
 476         { .start = 0x00a030bc, .end = 0x00a030c0 },
 477         { .start = 0x00a030c8, .end = 0x00a030f4 },
 478         { .start = 0x00a03100, .end = 0x00a0312c },
 479         { .start = 0x00a03c00, .end = 0x00a03c5c },
 480         { .start = 0x00a04400, .end = 0x00a04454 },
 481         { .start = 0x00a04460, .end = 0x00a04474 },
 482         { .start = 0x00a044c0, .end = 0x00a044ec },
 483         { .start = 0x00a04500, .end = 0x00a04504 },
 484         { .start = 0x00a04510, .end = 0x00a04538 },
 485         { .start = 0x00a04540, .end = 0x00a04548 },
 486         { .start = 0x00a04560, .end = 0x00a04560 },
 487         { .start = 0x00a04570, .end = 0x00a0457c },
 488         { .start = 0x00a04590, .end = 0x00a04590 },
 489         { .start = 0x00a04598, .end = 0x00a04598 },
 490         { .start = 0x00a045c0, .end = 0x00a045f4 },
 491         { .start = 0x00a05c18, .end = 0x00a05c1c },
 492         { .start = 0x00a0c000, .end = 0x00a0c018 },
 493         { .start = 0x00a0c020, .end = 0x00a0c028 },
 494         { .start = 0x00a0c038, .end = 0x00a0c094 },
 495         { .start = 0x00a0c0c0, .end = 0x00a0c104 },
 496         { .start = 0x00a0c10c, .end = 0x00a0c118 },
 497         { .start = 0x00a0c150, .end = 0x00a0c174 },
 498         { .start = 0x00a0c17c, .end = 0x00a0c188 },
 499         { .start = 0x00a0c190, .end = 0x00a0c198 },
 500         { .start = 0x00a0c1a0, .end = 0x00a0c1a8 },
 501         { .start = 0x00a0c1b0, .end = 0x00a0c1b8 },
 502 };
 503
 504 static const struct iwl_prph_range iwl_prph_dump_addr_ax210[] = {
 505         { .start = 0x00d03c00, .end = 0x00d03c64 },
 506         { .start = 0x00d05c18, .end = 0x00d05c1c },
 507         { .start = 0x00d0c000, .end = 0x00d0c174 },
 508 };
 509
 510 static void iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 511                                 u32 len_bytes, __le32 *data)
 512 {
 513         u32 i;
 514
 515         for (i = 0; i < len_bytes; i += 4)
 516                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
 517 }
 518
 519 static void iwl_dump_prph(struct iwl_fw_runtime *fwrt,
 520                           const struct iwl_prph_range *iwl_prph_dump_addr,
 521                           u32 range_len, void *ptr)
 522 {
 523         struct iwl_fw_error_dump_prph *prph;
 524         struct iwl_trans *trans = fwrt->trans;
 525         struct iwl_fw_error_dump_data **data =
 526                 (struct iwl_fw_error_dump_data **)ptr;
 527         u32 i;
 528
 529         if (!data)
 530                 return;
 531
 532         IWL_DEBUG_INFO(trans, "WRT PRPH dump\n");
 533
 534         if (!iwl_trans_grab_nic_access(trans))
 535                 return;
 536
 537         for (i = 0; i < range_len; i++) {
 538                 /* The range includes both boundaries */
 539                 int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
 540                          iwl_prph_dump_addr[i].start + 4;
 541
 542                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
 543                 (*data)->len = cpu_to_le32(sizeof(*prph) +
 544                                         num_bytes_in_chunk);
 545                 prph = (void *)(*data)->data;
 546                 prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
 547
 548                 iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
 549                                     /* our range is inclusive, hence + 4 */
 550                                     iwl_prph_dump_addr[i].end -
 551                                     iwl_prph_dump_addr[i].start + 4,
 552                                     (void *)prph->data);
 553
 554                 *data = iwl_fw_error_next_data(*data);
 555         }
 556
 557         iwl_trans_release_nic_access(trans);
 558 }
 559
 560 /*
 561  * alloc_sgtable - allocates scallerlist table in the given size,
 562  * fills it with pages and returns it
 563  * @size: the size (in bytes) of the table
 564 */
 565 static struct scatterlist *alloc_sgtable(int size)
 566 {
 567         int alloc_size, nents, i;
 568         struct page *new_page;
 569         struct scatterlist *iter;
 570         struct scatterlist *table;
 571
 572         nents = DIV_ROUND_UP(size, PAGE_SIZE);
 573         table = kcalloc(nents, sizeof(*table), GFP_KERNEL);
 574         if (!table)
 575                 return NULL;
 576         sg_init_table(table, nents);
 577         iter = table;
 578         for_each_sg(table, iter, sg_nents(table), i) {
 579                 new_page = alloc_page(GFP_KERNEL);
 580                 if (!new_page) {
 581                         /* release all previous allocated pages in the table */
 582                         iter = table;
 583                         for_each_sg(table, iter, sg_nents(table), i) {
 584                                 new_page = sg_page(iter);
 585                                 if (new_page)
 586                                         __free_page(new_page);
 587                         }
 588                         kfree(table);
 589                         return NULL;
 590                 }
 591                 alloc_size = min_t(int, size, PAGE_SIZE);
 592                 size -= PAGE_SIZE;
 593                 sg_set_page(iter, new_page, alloc_size, 0);
 594         }
 595         return table;
 596 }
 597
 598 static void iwl_fw_get_prph_len(struct iwl_fw_runtime *fwrt,
 599                                 const struct iwl_prph_range *iwl_prph_dump_addr,
 600                                 u32 range_len, void *ptr)
 601 {
 602         u32 *prph_len = (u32 *)ptr;
 603         int i, num_bytes_in_chunk;
 604
 605         if (!prph_len)
 606                 return;
 607
 608         for (i = 0; i < range_len; i++) {
 609                 /* The range includes both boundaries */
 610                 num_bytes_in_chunk =
 611                         iwl_prph_dump_addr[i].end -
 612                         iwl_prph_dump_addr[i].start + 4;
 613
 614                 *prph_len += sizeof(struct iwl_fw_error_dump_data) +
 615                         sizeof(struct iwl_fw_error_dump_prph) +
 616                         num_bytes_in_chunk;
 617         }
 618 }
 619
 620 static void iwl_fw_prph_handler(struct iwl_fw_runtime *fwrt, void *ptr,
 621                                 void (*handler)(struct iwl_fw_runtime *,
 622                                                 const struct iwl_prph_range *,
 623                                                 u32, void *))
 624 {
 625         u32 range_len;
 626
 627         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
 628                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_ax210);
 629                 handler(fwrt, iwl_prph_dump_addr_ax210, range_len, ptr);
 630         } else if (fwrt->trans->trans_cfg->device_family >=
 631                    IWL_DEVICE_FAMILY_22000) {
 632                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_22000);
 633                 handler(fwrt, iwl_prph_dump_addr_22000, range_len, ptr);
 634         } else {
 635                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_comm);
 636                 handler(fwrt, iwl_prph_dump_addr_comm, range_len, ptr);
 637
 638                 if (fwrt->trans->trans_cfg->mq_rx_supported) {
 639                         range_len = ARRAY_SIZE(iwl_prph_dump_addr_9000);
 640                         handler(fwrt, iwl_prph_dump_addr_9000, range_len, ptr);
 641                 }
 642         }
 643 }
 644
 645 static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
 646                             struct iwl_fw_error_dump_data **dump_data,
 647                             u32 len, u32 ofs, u32 type)
 648 {
 649         struct iwl_fw_error_dump_mem *dump_mem;
 650
 651         if (!len)
 652                 return;
 653
 654         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 655         (*dump_data)->len = cpu_to_le32(len + sizeof(*dump_mem));
 656         dump_mem = (void *)(*dump_data)->data;
 657         dump_mem->type = cpu_to_le32(type);
 658         dump_mem->offset = cpu_to_le32(ofs);
 659         iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
 660         *dump_data = iwl_fw_error_next_data(*dump_data);
 661
 662         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 663                 fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, ofs,
 664                                              dump_mem->data, len);
 665
 666         IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n", dump_mem->type);
 667 }
 668
 669 #define ADD_LEN(len, item_len, const_len) \
 670         do {size_t item = item_len; len += (!!item) * const_len + item; } \
 671         while (0)
 672
 673 static int iwl_fw_rxf_len(struct iwl_fw_runtime *fwrt,
 674                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 675 {
 676         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 677                          sizeof(struct iwl_fw_error_dump_fifo);
 678         u32 fifo_len = 0;
 679         int i;
 680
 681         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF))
 682                 return 0;
 683
 684         /* Count RXF2 size */
 685         ADD_LEN(fifo_len, mem_cfg->rxfifo2_size, hdr_len);
 686
 687         /* Count RXF1 sizes */
 688         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 689                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 690
 691         for (i = 0; i < mem_cfg->num_lmacs; i++)
 692                 ADD_LEN(fifo_len, mem_cfg->lmac[i].rxfifo1_size, hdr_len);
 693
 694         return fifo_len;
 695 }
 696
 697 static int iwl_fw_txf_len(struct iwl_fw_runtime *fwrt,
 698                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 699 {
 700         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 701                          sizeof(struct iwl_fw_error_dump_fifo);
 702         u32 fifo_len = 0;
 703         int i;
 704
 705         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF))
 706                 goto dump_internal_txf;
 707
 708         /* Count TXF sizes */
 709         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 710                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 711
 712         for (i = 0; i < mem_cfg->num_lmacs; i++) {
 713                 int j;
 714
 715                 for (j = 0; j < mem_cfg->num_txfifo_entries; j++)
 716                         ADD_LEN(fifo_len, mem_cfg->lmac[i].txfifo_size[j],
 717                                 hdr_len);
 718         }
 719
 720 dump_internal_txf:
 721         if (!(iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 722               fw_has_capa(&fwrt->fw->ucode_capa,
 723                           IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)))
 724                 goto out;
 725
 726         for (i = 0; i < ARRAY_SIZE(mem_cfg->internal_txfifo_size); i++)
 727                 ADD_LEN(fifo_len, mem_cfg->internal_txfifo_size[i], hdr_len);
 728
 729 out:
 730         return fifo_len;
 731 }
 732
 733 static void iwl_dump_paging(struct iwl_fw_runtime *fwrt,
 734                             struct iwl_fw_error_dump_data **data)
 735 {
 736         int i;
 737
 738         IWL_DEBUG_INFO(fwrt, "WRT paging dump\n");
 739         for (i = 1; i < fwrt->num_of_paging_blk + 1; i++) {
 740                 struct iwl_fw_error_dump_paging *paging;
 741                 struct page *pages =
 742                         fwrt->fw_paging_db[i].fw_paging_block;
 743                 dma_addr_t addr = fwrt->fw_paging_db[i].fw_paging_phys;
 744
 745                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING);
 746                 (*data)->len = cpu_to_le32(sizeof(*paging) +
 747                                              PAGING_BLOCK_SIZE);
 748                 paging =  (void *)(*data)->data;
 749                 paging->index = cpu_to_le32(i);
 750                 dma_sync_single_for_cpu(fwrt->trans->dev, addr,
 751                                         PAGING_BLOCK_SIZE,
 752                                         DMA_BIDIRECTIONAL);
 753                 memcpy(paging->data, page_address(pages),
 754                        PAGING_BLOCK_SIZE);
 755                 dma_sync_single_for_device(fwrt->trans->dev, addr,
 756                                            PAGING_BLOCK_SIZE,
 757                                            DMA_BIDIRECTIONAL);
 758                 (*data) = iwl_fw_error_next_data(*data);
 759
 760                 if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 761                         fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
 762                                                      fwrt->fw_paging_db[i].fw_offs,
 763                                                      paging->data,
 764                                                      PAGING_BLOCK_SIZE);
 765         }
 766 }
 767
 768 static struct iwl_fw_error_dump_file *
 769 iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
 770                        struct iwl_fw_dump_ptrs *fw_error_dump,
 771                        struct iwl_fwrt_dump_data *data)
 772 {
 773         struct iwl_fw_error_dump_file *dump_file;
 774         struct iwl_fw_error_dump_data *dump_data;
 775         struct iwl_fw_error_dump_info *dump_info;
 776         struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
 777         struct iwl_fw_error_dump_trigger_desc *dump_trig;
 778         u32 sram_len, sram_ofs;
 779         const struct iwl_fw_dbg_mem_seg_tlv *fw_mem = fwrt->fw->dbg.mem_tlv;
 780         struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
 781         u32 file_len, fifo_len = 0, prph_len = 0, radio_len = 0;
 782         u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
 783         u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
 784                                 0 : fwrt->trans->cfg->dccm2_len;
 785         int i;
 786
 787         /* SRAM - include stack CCM if driver knows the values for it */
 788         if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
 789                 const struct fw_img *img;
 790
 791                 if (fwrt->cur_fw_img >= IWL_UCODE_TYPE_MAX)
 792                         return NULL;
 793                 img = &fwrt->fw->img[fwrt->cur_fw_img];
 794                 sram_ofs = img->sec[IWL_UCODE_SECTION_DATA].offset;
 795                 sram_len = img->sec[IWL_UCODE_SECTION_DATA].len;
 796         } else {
 797                 sram_ofs = fwrt->trans->cfg->dccm_offset;
 798                 sram_len = fwrt->trans->cfg->dccm_len;
 799         }
 800
 801         /* reading RXF/TXF sizes */
 802         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
 803                 fifo_len = iwl_fw_rxf_len(fwrt, mem_cfg);
 804                 fifo_len += iwl_fw_txf_len(fwrt, mem_cfg);
 805
 806                 /* Make room for PRPH registers */
 807                 if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_PRPH))
 808                         iwl_fw_prph_handler(fwrt, &prph_len,
 809                                             iwl_fw_get_prph_len);
 810
 811                 if (fwrt->trans->trans_cfg->device_family ==
 812                     IWL_DEVICE_FAMILY_7000 &&
 813                     iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RADIO_REG))
 814                         radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
 815         }
 816
 817         file_len = sizeof(*dump_file) + fifo_len + prph_len + radio_len;
 818
 819         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO))
 820                 file_len += sizeof(*dump_data) + sizeof(*dump_info);
 821         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG))
 822                 file_len += sizeof(*dump_data) + sizeof(*dump_smem_cfg);
 823
 824         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 825                 size_t hdr_len = sizeof(*dump_data) +
 826                                  sizeof(struct iwl_fw_error_dump_mem);
 827
 828                 /* Dump SRAM only if no mem_tlvs */
 829                 if (!fwrt->fw->dbg.n_mem_tlv)
 830                         ADD_LEN(file_len, sram_len, hdr_len);
 831
 832                 /* Make room for all mem types that exist */
 833                 ADD_LEN(file_len, smem_len, hdr_len);
 834                 ADD_LEN(file_len, sram2_len, hdr_len);
 835
 836                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++)
 837                         ADD_LEN(file_len, le32_to_cpu(fw_mem[i].len), hdr_len);
 838         }
 839
 840         /* Make room for fw's virtual image pages, if it exists */
 841         if (iwl_fw_dbg_is_paging_enabled(fwrt))
 842                 file_len += fwrt->num_of_paging_blk *
 843                         (sizeof(*dump_data) +
 844                          sizeof(struct iwl_fw_error_dump_paging) +
 845                          PAGING_BLOCK_SIZE);
 846
 847         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 848                 file_len += sizeof(*dump_data) +
 849                         fwrt->trans->cfg->d3_debug_data_length * 2;
 850         }
 851
 852         /* If we only want a monitor dump, reset the file length */
 853         if (data->monitor_only) {
 854                 file_len = sizeof(*dump_file) + sizeof(*dump_data) * 2 +
 855                            sizeof(*dump_info) + sizeof(*dump_smem_cfg);
 856         }
 857
 858         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 859             data->desc)
 860                 file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
 861                         data->desc->len;
 862
 863         dump_file = vzalloc(file_len);
 864         if (!dump_file)
 865                 return NULL;
 866
 867         fw_error_dump->fwrt_ptr = dump_file;
 868
 869         dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
 870         dump_data = (void *)dump_file->data;
 871
 872         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
 873                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
 874                 dump_data->len = cpu_to_le32(sizeof(*dump_info));
 875                 dump_info = (void *)dump_data->data;
 876                 dump_info->hw_type =
 877                         cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
 878                 dump_info->hw_step =
 879                         cpu_to_le32(fwrt->trans->hw_rev_step);
 880                 memcpy(dump_info->fw_human_readable, fwrt->fw->human_readable,
 881                        sizeof(dump_info->fw_human_readable));
 882                 strscpy_pad(dump_info->dev_human_readable, fwrt->trans->name,
 883                         sizeof(dump_info->dev_human_readable));
 884                 strscpy_pad(dump_info->bus_human_readable, fwrt->dev->bus->name,
 885                         sizeof(dump_info->bus_human_readable));
 886                 dump_info->num_of_lmacs = fwrt->smem_cfg.num_lmacs;
 887                 dump_info->lmac_err_id[0] =
 888                         cpu_to_le32(fwrt->dump.lmac_err_id[0]);
 889                 if (fwrt->smem_cfg.num_lmacs > 1)
 890                         dump_info->lmac_err_id[1] =
 891                                 cpu_to_le32(fwrt->dump.lmac_err_id[1]);
 892                 dump_info->umac_err_id = cpu_to_le32(fwrt->dump.umac_err_id);
 893
 894                 dump_data = iwl_fw_error_next_data(dump_data);
 895         }
 896
 897         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG)) {
 898                 /* Dump shared memory configuration */
 899                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
 900                 dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
 901                 dump_smem_cfg = (void *)dump_data->data;
 902                 dump_smem_cfg->num_lmacs = cpu_to_le32(mem_cfg->num_lmacs);
 903                 dump_smem_cfg->num_txfifo_entries =
 904                         cpu_to_le32(mem_cfg->num_txfifo_entries);
 905                 for (i = 0; i < MAX_NUM_LMAC; i++) {
 906                         int j;
 907                         u32 *txf_size = mem_cfg->lmac[i].txfifo_size;
 908
 909                         for (j = 0; j < TX_FIFO_MAX_NUM; j++)
 910                                 dump_smem_cfg->lmac[i].txfifo_size[j] =
 911                                         cpu_to_le32(txf_size[j]);
 912                         dump_smem_cfg->lmac[i].rxfifo1_size =
 913                                 cpu_to_le32(mem_cfg->lmac[i].rxfifo1_size);
 914                 }
 915                 dump_smem_cfg->rxfifo2_size =
 916                         cpu_to_le32(mem_cfg->rxfifo2_size);
 917                 dump_smem_cfg->internal_txfifo_addr =
 918                         cpu_to_le32(mem_cfg->internal_txfifo_addr);
 919                 for (i = 0; i < TX_FIFO_INTERNAL_MAX_NUM; i++) {
 920                         dump_smem_cfg->internal_txfifo_size[i] =
 921                                 cpu_to_le32(mem_cfg->internal_txfifo_size[i]);
 922                 }
 923
 924                 dump_data = iwl_fw_error_next_data(dump_data);
 925         }
 926
 927         /* We only dump the FIFOs if the FW is in error state */
 928         if (fifo_len) {
 929                 iwl_fw_dump_rxf(fwrt, &dump_data);
 930                 iwl_fw_dump_txf(fwrt, &dump_data);
 931         }
 932
 933         if (radio_len)
 934                 iwl_read_radio_regs(fwrt, &dump_data);
 935
 936         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 937             data->desc) {
 938                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
 939                 dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
 940                                              data->desc->len);
 941                 dump_trig = (void *)dump_data->data;
 942                 memcpy(dump_trig, &data->desc->trig_desc,
 943                        sizeof(*dump_trig) + data->desc->len);
 944
 945                 dump_data = iwl_fw_error_next_data(dump_data);
 946         }
 947
 948         /* In case we only want monitor dump, skip to dump trasport data */
 949         if (data->monitor_only)
 950                 goto out;
 951
 952         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 953                 const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem =
 954                         fwrt->fw->dbg.mem_tlv;
 955
 956                 if (!fwrt->fw->dbg.n_mem_tlv)
 957                         iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs,
 958                                         IWL_FW_ERROR_DUMP_MEM_SRAM);
 959
 960                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
 961                         u32 len = le32_to_cpu(fw_dbg_mem[i].len);
 962                         u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
 963
 964                         iwl_fw_dump_mem(fwrt, &dump_data, len, ofs,
 965                                         le32_to_cpu(fw_dbg_mem[i].data_type));
 966                 }
 967
 968                 iwl_fw_dump_mem(fwrt, &dump_data, smem_len,
 969                                 fwrt->trans->cfg->smem_offset,
 970                                 IWL_FW_ERROR_DUMP_MEM_SMEM);
 971
 972                 iwl_fw_dump_mem(fwrt, &dump_data, sram2_len,
 973                                 fwrt->trans->cfg->dccm2_offset,
 974                                 IWL_FW_ERROR_DUMP_MEM_SRAM);
 975         }
 976
 977         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 978                 u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
 979                 size_t data_size = fwrt->trans->cfg->d3_debug_data_length;
 980
 981                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
 982                 dump_data->len = cpu_to_le32(data_size * 2);
 983
 984                 memcpy(dump_data->data, fwrt->dump.d3_debug_data, data_size);
 985
 986                 kfree(fwrt->dump.d3_debug_data);
 987                 fwrt->dump.d3_debug_data = NULL;
 988
 989                 iwl_trans_read_mem_bytes(fwrt->trans, addr,
 990                                          dump_data->data + data_size,
 991                                          data_size);
 992
 993                 if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
 994                         fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx, addr,
 995                                                      dump_data->data + data_size,
 996                                                      data_size);
 997
 998                 dump_data = iwl_fw_error_next_data(dump_data);
 999         }
1000
1001         /* Dump fw's virtual image */
1002         if (iwl_fw_dbg_is_paging_enabled(fwrt))
1003                 iwl_dump_paging(fwrt, &dump_data);
1004
1005         if (prph_len)
1006                 iwl_fw_prph_handler(fwrt, &dump_data, iwl_dump_prph);
1007
1008 out:
1009         dump_file->file_len = cpu_to_le32(file_len);
1010         return dump_file;
1011 }
1012
1013 /**
1014  * struct iwl_dump_ini_region_data - region data
1015  * @reg_tlv: region TLV
1016  * @dump_data: dump data
1017  */
1018 struct iwl_dump_ini_region_data {
1019         struct iwl_ucode_tlv *reg_tlv;
1020         struct iwl_fwrt_dump_data *dump_data;
1021 };
1022
1023 static int iwl_dump_ini_prph_mac_iter_common(struct iwl_fw_runtime *fwrt,
1024                                              void *range_ptr, u32 addr,
1025                                              __le32 size)
1026 {
1027         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1028         __le32 *val = range->data;
1029         u32 prph_val;
1030         int i;
1031
1032         range->internal_base_addr = cpu_to_le32(addr);
1033         range->range_data_size = size;
1034         for (i = 0; i < le32_to_cpu(size); i += 4) {
1035                 prph_val = iwl_read_prph(fwrt->trans, addr + i);
1036                 if (iwl_trans_is_hw_error_value(prph_val))
1037                         return -EBUSY;
1038                 *val++ = cpu_to_le32(prph_val);
1039         }
1040
1041         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1042 }
1043
1044 static int
1045 iwl_dump_ini_prph_mac_iter(struct iwl_fw_runtime *fwrt,
1046                            struct iwl_dump_ini_region_data *reg_data,
1047                            void *range_ptr, u32 range_len, int idx)
1048 {
1049         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1050         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1051                    le32_to_cpu(reg->dev_addr.offset);
1052
1053         return iwl_dump_ini_prph_mac_iter_common(fwrt, range_ptr, addr,
1054                                                  reg->dev_addr.size);
1055 }
1056
1057 static int
1058 iwl_dump_ini_prph_mac_block_iter(struct iwl_fw_runtime *fwrt,
1059                                  struct iwl_dump_ini_region_data *reg_data,
1060                                  void *range_ptr, u32 range_len, int idx)
1061 {
1062         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1063         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1064         u32 addr = le32_to_cpu(reg->dev_addr_range.offset) +
1065                    le32_to_cpu(pairs[idx].addr);
1066
1067         return iwl_dump_ini_prph_mac_iter_common(fwrt, range_ptr, addr,
1068                                                  pairs[idx].size);
1069 }
1070
1071 static int iwl_dump_ini_prph_phy_iter_common(struct iwl_fw_runtime *fwrt,
1072                                              void *range_ptr, u32 addr,
1073                                              __le32 size, __le32 offset)
1074 {
1075         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1076         __le32 *val = range->data;
1077         u32 indirect_wr_addr = WMAL_INDRCT_RD_CMD1;
1078         u32 indirect_rd_addr = WMAL_MRSPF_1;
1079         u32 prph_val;
1080         u32 dphy_state;
1081         u32 dphy_addr;
1082         int i;
1083
1084         range->internal_base_addr = cpu_to_le32(addr);
1085         range->range_data_size = size;
1086
1087         if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
1088                 indirect_wr_addr = WMAL_INDRCT_CMD1;
1089
1090         indirect_wr_addr += le32_to_cpu(offset);
1091         indirect_rd_addr += le32_to_cpu(offset);
1092
1093         if (!iwl_trans_grab_nic_access(fwrt->trans))
1094                 return -EBUSY;
1095
1096         dphy_addr = (offset) ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
1097         dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1098
1099         for (i = 0; i < le32_to_cpu(size); i += 4) {
1100                 if (dphy_state == HBUS_TIMEOUT ||
1101                     (dphy_state & WFPM_PS_CTL_RW_PHYRF_PD_FSM_CURSTATE_MSK) !=
1102                     WFPM_PHYRF_STATE_ON) {
1103                         *val++ = cpu_to_le32(WFPM_DPHY_OFF);
1104                         continue;
1105                 }
1106
1107                 iwl_write_prph_no_grab(fwrt->trans, indirect_wr_addr,
1108                                        WMAL_INDRCT_CMD(addr + i));
1109                 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1110                                                  indirect_rd_addr);
1111                 *val++ = cpu_to_le32(prph_val);
1112         }
1113
1114         iwl_trans_release_nic_access(fwrt->trans);
1115         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1116 }
1117
1118 static int
1119 iwl_dump_ini_prph_phy_iter(struct iwl_fw_runtime *fwrt,
1120                            struct iwl_dump_ini_region_data *reg_data,
1121                            void *range_ptr, u32 range_len, int idx)
1122 {
1123         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1124         u32 addr = le32_to_cpu(reg->addrs[idx]);
1125
1126         return iwl_dump_ini_prph_phy_iter_common(fwrt, range_ptr, addr,
1127                                                  reg->dev_addr.size,
1128                                                  reg->dev_addr.offset);
1129 }
1130
1131 static int
1132 iwl_dump_ini_prph_phy_block_iter(struct iwl_fw_runtime *fwrt,
1133                                  struct iwl_dump_ini_region_data *reg_data,
1134                                  void *range_ptr, u32 range_len, int idx)
1135 {
1136         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1137         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1138         u32 addr = le32_to_cpu(pairs[idx].addr);
1139
1140         return iwl_dump_ini_prph_phy_iter_common(fwrt, range_ptr, addr,
1141                                                  pairs[idx].size,
1142                                                  reg->dev_addr_range.offset);
1143 }
1144
1145 static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt,
1146                                  struct iwl_dump_ini_region_data *reg_data,
1147                                  void *range_ptr, u32 range_len, int idx)
1148 {
1149         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1150         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1151         __le32 *val = range->data;
1152         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1153                    le32_to_cpu(reg->dev_addr.offset);
1154         int i;
1155
1156         range->internal_base_addr = cpu_to_le32(addr);
1157         range->range_data_size = reg->dev_addr.size;
1158         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4)
1159                 *val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
1160
1161         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1162 }
1163
1164 static int iwl_dump_ini_config_iter(struct iwl_fw_runtime *fwrt,
1165                                     struct iwl_dump_ini_region_data *reg_data,
1166                                     void *range_ptr, u32 range_len, int idx)
1167 {
1168         struct iwl_trans *trans = fwrt->trans;
1169         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1170         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1171         __le32 *val = range->data;
1172         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1173                    le32_to_cpu(reg->dev_addr.offset);
1174         int i;
1175
1176         /* we shouldn't get here if the trans doesn't have read_config32 */
1177         if (WARN_ON_ONCE(!trans->ops->read_config32))
1178                 return -EOPNOTSUPP;
1179
1180         range->internal_base_addr = cpu_to_le32(addr);
1181         range->range_data_size = reg->dev_addr.size;
1182         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1183                 int ret;
1184                 u32 tmp;
1185
1186                 ret = trans->ops->read_config32(trans, addr + i, &tmp);
1187                 if (ret < 0)
1188                         return ret;
1189
1190                 *val++ = cpu_to_le32(tmp);
1191         }
1192
1193         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1194 }
1195
1196 static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
1197                                      struct iwl_dump_ini_region_data *reg_data,
1198                                      void *range_ptr, u32 range_len, int idx)
1199 {
1200         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1201         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1202         u32 addr = le32_to_cpu(reg->addrs[idx]) +
1203                    le32_to_cpu(reg->dev_addr.offset);
1204
1205         range->internal_base_addr = cpu_to_le32(addr);
1206         range->range_data_size = reg->dev_addr.size;
1207         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1208                                  le32_to_cpu(reg->dev_addr.size));
1209
1210         if (reg->sub_type == IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM &&
1211             fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
1212                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
1213                                              range->data,
1214                                              le32_to_cpu(reg->dev_addr.size));
1215
1216         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1217 }
1218
1219 static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1220                                      void *range_ptr, u32 range_len, int idx)
1221 {
1222         struct page *page = fwrt->fw_paging_db[idx].fw_paging_block;
1223         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1224         dma_addr_t addr = fwrt->fw_paging_db[idx].fw_paging_phys;
1225         u32 page_size = fwrt->fw_paging_db[idx].fw_paging_size;
1226
1227         range->page_num = cpu_to_le32(idx);
1228         range->range_data_size = cpu_to_le32(page_size);
1229         dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
1230                                 DMA_BIDIRECTIONAL);
1231         memcpy(range->data, page_address(page), page_size);
1232         dma_sync_single_for_device(fwrt->trans->dev, addr, page_size,
1233                                    DMA_BIDIRECTIONAL);
1234
1235         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1236 }
1237
1238 static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1239                                     struct iwl_dump_ini_region_data *reg_data,
1240                                     void *range_ptr, u32 range_len, int idx)
1241 {
1242         struct iwl_fw_ini_error_dump_range *range;
1243         u32 page_size;
1244
1245         /* all paged index start from 1 to skip CSS section */
1246         idx++;
1247
1248         if (!fwrt->trans->trans_cfg->gen2)
1249                 return _iwl_dump_ini_paging_iter(fwrt, range_ptr, range_len, idx);
1250
1251         range = range_ptr;
1252         page_size = fwrt->trans->init_dram.paging[idx].size;
1253
1254         range->page_num = cpu_to_le32(idx);
1255         range->range_data_size = cpu_to_le32(page_size);
1256         memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
1257                page_size);
1258
1259         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1260 }
1261
1262 static int
1263 iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt,
1264                            struct iwl_dump_ini_region_data *reg_data,
1265                            void *range_ptr, u32 range_len, int idx)
1266 {
1267         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1268         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1269         struct iwl_dram_data *frag;
1270         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1271
1272         frag = &fwrt->trans->dbg.fw_mon_ini[alloc_id].frags[idx];
1273
1274         range->dram_base_addr = cpu_to_le64(frag->physical);
1275         range->range_data_size = cpu_to_le32(frag->size);
1276
1277         memcpy(range->data, frag->block, frag->size);
1278
1279         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1280 }
1281
1282 static int iwl_dump_ini_mon_smem_iter(struct iwl_fw_runtime *fwrt,
1283                                       struct iwl_dump_ini_region_data *reg_data,
1284                                       void *range_ptr, u32 range_len, int idx)
1285 {
1286         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1287         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1288         u32 addr = le32_to_cpu(reg->internal_buffer.base_addr);
1289
1290         range->internal_base_addr = cpu_to_le32(addr);
1291         range->range_data_size = reg->internal_buffer.size;
1292         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1293                                  le32_to_cpu(reg->internal_buffer.size));
1294
1295         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1296 }
1297
1298 static bool iwl_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1299                              struct iwl_dump_ini_region_data *reg_data, int idx)
1300 {
1301         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1302         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1303         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
1304         int txf_num = cfg->num_txfifo_entries;
1305         int int_txf_num = ARRAY_SIZE(cfg->internal_txfifo_size);
1306         u32 lmac_bitmap = le32_to_cpu(reg->fifos.fid[0]);
1307
1308         if (!idx) {
1309                 if (le32_to_cpu(reg->fifos.offset) && cfg->num_lmacs == 1) {
1310                         IWL_ERR(fwrt, "WRT: Invalid lmac offset 0x%x\n",
1311                                 le32_to_cpu(reg->fifos.offset));
1312                         return false;
1313                 }
1314
1315                 iter->internal_txf = 0;
1316                 iter->fifo_size = 0;
1317                 iter->fifo = -1;
1318                 if (le32_to_cpu(reg->fifos.offset))
1319                         iter->lmac = 1;
1320                 else
1321                         iter->lmac = 0;
1322         }
1323
1324         if (!iter->internal_txf) {
1325                 for (iter->fifo++; iter->fifo < txf_num; iter->fifo++) {
1326                         iter->fifo_size =
1327                                 cfg->lmac[iter->lmac].txfifo_size[iter->fifo];
1328                         if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1329                                 return true;
1330                 }
1331                 iter->fifo--;
1332         }
1333
1334         iter->internal_txf = 1;
1335
1336         if (!fw_has_capa(&fwrt->fw->ucode_capa,
1337                          IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
1338                 return false;
1339
1340         for (iter->fifo++; iter->fifo < int_txf_num + txf_num; iter->fifo++) {
1341                 iter->fifo_size =
1342                         cfg->internal_txfifo_size[iter->fifo - txf_num];
1343                 if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1344                         return true;
1345         }
1346
1347         return false;
1348 }
1349
1350 static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1351                                  struct iwl_dump_ini_region_data *reg_data,
1352                                  void *range_ptr, u32 range_len, int idx)
1353 {
1354         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1355         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1356         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1357         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1358         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1359         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1360         u32 registers_size = registers_num * sizeof(*reg_dump);
1361         __le32 *data;
1362         int i;
1363
1364         if (!iwl_ini_txf_iter(fwrt, reg_data, idx))
1365                 return -EIO;
1366
1367         if (!iwl_trans_grab_nic_access(fwrt->trans))
1368                 return -EBUSY;
1369
1370         range->fifo_hdr.fifo_num = cpu_to_le32(iter->fifo);
1371         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1372         range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
1373
1374         iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
1375
1376         /*
1377          * read txf registers. for each register, write to the dump the
1378          * register address and its value
1379          */
1380         for (i = 0; i < registers_num; i++) {
1381                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1382
1383                 reg_dump->addr = cpu_to_le32(addr);
1384                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1385                                                                    addr));
1386
1387                 reg_dump++;
1388         }
1389
1390         if (reg->fifos.hdr_only) {
1391                 range->range_data_size = cpu_to_le32(registers_size);
1392                 goto out;
1393         }
1394
1395         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
1396         iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
1397                                TXF_WR_PTR + offs);
1398
1399         /* Dummy-read to advance the read pointer to the head */
1400         iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
1401
1402         /* Read FIFO */
1403         addr = TXF_READ_MODIFY_DATA + offs;
1404         data = (void *)reg_dump;
1405         for (i = 0; i < iter->fifo_size; i += sizeof(*data))
1406                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1407
1408         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
1409                 fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
1410                                              reg_dump, iter->fifo_size);
1411
1412 out:
1413         iwl_trans_release_nic_access(fwrt->trans);
1414
1415         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1416 }
1417
1418 static int
1419 iwl_dump_ini_prph_snps_dphyip_iter(struct iwl_fw_runtime *fwrt,
1420                                    struct iwl_dump_ini_region_data *reg_data,
1421                                    void *range_ptr, u32 range_len, int idx)
1422 {
1423         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1424         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1425         __le32 *val = range->data;
1426         __le32 offset = reg->dev_addr.offset;
1427         u32 indirect_rd_wr_addr = DPHYIP_INDIRECT;
1428         u32 addr = le32_to_cpu(reg->addrs[idx]);
1429         u32 dphy_state, dphy_addr, prph_val;
1430         int i;
1431
1432         range->internal_base_addr = cpu_to_le32(addr);
1433         range->range_data_size = reg->dev_addr.size;
1434
1435         if (!iwl_trans_grab_nic_access(fwrt->trans))
1436                 return -EBUSY;
1437
1438         indirect_rd_wr_addr += le32_to_cpu(offset);
1439
1440         dphy_addr = offset ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
1441         dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
1442
1443         for (i = 0; i < le32_to_cpu(reg->dev_addr.size); i += 4) {
1444                 if (dphy_state == HBUS_TIMEOUT ||
1445                     (dphy_state & WFPM_PS_CTL_RW_PHYRF_PD_FSM_CURSTATE_MSK) !=
1446                     WFPM_PHYRF_STATE_ON) {
1447                         *val++ = cpu_to_le32(WFPM_DPHY_OFF);
1448                         continue;
1449                 }
1450
1451                 iwl_write_prph_no_grab(fwrt->trans, indirect_rd_wr_addr,
1452                                        addr + i);
1453                 /* wait a bit for value to be ready in register */
1454                 udelay(1);
1455                 prph_val = iwl_read_prph_no_grab(fwrt->trans,
1456                                                  indirect_rd_wr_addr);
1457                 *val++ = cpu_to_le32((prph_val & DPHYIP_INDIRECT_RD_MSK) >>
1458                                      DPHYIP_INDIRECT_RD_SHIFT);
1459         }
1460
1461         iwl_trans_release_nic_access(fwrt->trans);
1462         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1463 }
1464
1465 struct iwl_ini_rxf_data {
1466         u32 fifo_num;
1467         u32 size;
1468         u32 offset;
1469 };
1470
1471 static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
1472                                  struct iwl_dump_ini_region_data *reg_data,
1473                                  struct iwl_ini_rxf_data *data)
1474 {
1475         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1476         u32 fid1 = le32_to_cpu(reg->fifos.fid[0]);
1477         u32 fid2 = le32_to_cpu(reg->fifos.fid[1]);
1478         u8 fifo_idx;
1479
1480         if (!data)
1481                 return;
1482
1483         memset(data, 0, sizeof(*data));
1484
1485         /* make sure only one bit is set in only one fid */
1486         if (WARN_ONCE(hweight_long(fid1) + hweight_long(fid2) != 1,
1487                       "fid1=%x, fid2=%x\n", fid1, fid2))
1488                 return;
1489
1490         if (fid1) {
1491                 fifo_idx = ffs(fid1) - 1;
1492                 if (WARN_ONCE(fifo_idx >= MAX_NUM_LMAC, "fifo_idx=%d\n",
1493                               fifo_idx))
1494                         return;
1495
1496                 data->size = fwrt->smem_cfg.lmac[fifo_idx].rxfifo1_size;
1497                 data->fifo_num = fifo_idx;
1498         } else {
1499                 u8 max_idx;
1500
1501                 fifo_idx = ffs(fid2) - 1;
1502                 if (iwl_fw_lookup_notif_ver(fwrt->fw, SYSTEM_GROUP,
1503                                             SHARED_MEM_CFG_CMD, 0) <= 3)
1504                         max_idx = 0;
1505                 else
1506                         max_idx = 1;
1507
1508                 if (WARN_ONCE(fifo_idx > max_idx,
1509                               "invalid umac fifo idx %d", fifo_idx))
1510                         return;
1511
1512                 /* use bit 31 to distinguish between umac and lmac rxf while
1513                  * parsing the dump
1514                  */
1515                 data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
1516
1517                 switch (fifo_idx) {
1518                 case 0:
1519                         data->size = fwrt->smem_cfg.rxfifo2_size;
1520                         data->offset = iwl_umac_prph(fwrt->trans,
1521                                                      RXF_DIFF_FROM_PREV);
1522                         break;
1523                 case 1:
1524                         data->size = fwrt->smem_cfg.rxfifo2_control_size;
1525                         data->offset = iwl_umac_prph(fwrt->trans,
1526                                                      RXF2C_DIFF_FROM_PREV);
1527                         break;
1528                 }
1529         }
1530 }
1531
1532 static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
1533                                  struct iwl_dump_ini_region_data *reg_data,
1534                                  void *range_ptr, u32 range_len, int idx)
1535 {
1536         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1537         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1538         struct iwl_ini_rxf_data rxf_data;
1539         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1540         u32 offs = le32_to_cpu(reg->fifos.offset), addr;
1541         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1542         u32 registers_size = registers_num * sizeof(*reg_dump);
1543         __le32 *data;
1544         int i;
1545
1546         iwl_ini_get_rxf_data(fwrt, reg_data, &rxf_data);
1547         if (!rxf_data.size)
1548                 return -EIO;
1549
1550         if (!iwl_trans_grab_nic_access(fwrt->trans))
1551                 return -EBUSY;
1552
1553         range->fifo_hdr.fifo_num = cpu_to_le32(rxf_data.fifo_num);
1554         range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
1555         range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
1556
1557         /*
1558          * read rxf registers. for each register, write to the dump the
1559          * register address and its value
1560          */
1561         for (i = 0; i < registers_num; i++) {
1562                 addr = le32_to_cpu(reg->addrs[i]) + offs;
1563
1564                 reg_dump->addr = cpu_to_le32(addr);
1565                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1566                                                                    addr));
1567
1568                 reg_dump++;
1569         }
1570
1571         if (reg->fifos.hdr_only) {
1572                 range->range_data_size = cpu_to_le32(registers_size);
1573                 goto out;
1574         }
1575
1576         offs = rxf_data.offset;
1577
1578         /* Lock fence */
1579         iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
1580         /* Set fence pointer to the same place like WR pointer */
1581         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
1582         /* Set fence offset */
1583         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
1584                                0x0);
1585
1586         /* Read FIFO */
1587         addr =  RXF_FIFO_RD_FENCE_INC + offs;
1588         data = (void *)reg_dump;
1589         for (i = 0; i < rxf_data.size; i += sizeof(*data))
1590                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1591
1592 out:
1593         iwl_trans_release_nic_access(fwrt->trans);
1594
1595         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1596 }
1597
1598 static int
1599 iwl_dump_ini_err_table_iter(struct iwl_fw_runtime *fwrt,
1600                             struct iwl_dump_ini_region_data *reg_data,
1601                             void *range_ptr, u32 range_len, int idx)
1602 {
1603         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1604         struct iwl_fw_ini_region_err_table *err_table = &reg->err_table;
1605         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1606         u32 addr = le32_to_cpu(err_table->base_addr) +
1607                    le32_to_cpu(err_table->offset);
1608
1609         range->internal_base_addr = cpu_to_le32(addr);
1610         range->range_data_size = err_table->size;
1611         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1612                                  le32_to_cpu(err_table->size));
1613
1614         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1615 }
1616
1617 static int
1618 iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt,
1619                               struct iwl_dump_ini_region_data *reg_data,
1620                               void *range_ptr, u32 range_len, int idx)
1621 {
1622         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1623         struct iwl_fw_ini_region_special_device_memory *special_mem =
1624                 &reg->special_mem;
1625
1626         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1627         u32 addr = le32_to_cpu(special_mem->base_addr) +
1628                    le32_to_cpu(special_mem->offset);
1629
1630         range->internal_base_addr = cpu_to_le32(addr);
1631         range->range_data_size = special_mem->size;
1632         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1633                                  le32_to_cpu(special_mem->size));
1634
1635         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1636 }
1637
1638 static int
1639 iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt,
1640                             struct iwl_dump_ini_region_data *reg_data,
1641                             void *range_ptr, u32 range_len, int idx)
1642 {
1643         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1644         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1645         __le32 *val = range->data;
1646         u32 prph_data;
1647         int i;
1648
1649         if (!iwl_trans_grab_nic_access(fwrt->trans))
1650                 return -EBUSY;
1651
1652         range->range_data_size = reg->dev_addr.size;
1653         for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
1654                 prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ?
1655                                           DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
1656                                           DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
1657                 if (iwl_trans_is_hw_error_value(prph_data)) {
1658                         iwl_trans_release_nic_access(fwrt->trans);
1659                         return -EBUSY;
1660                 }
1661                 *val++ = cpu_to_le32(prph_data);
1662         }
1663         iwl_trans_release_nic_access(fwrt->trans);
1664         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1665 }
1666
1667 static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt,
1668                                     struct iwl_dump_ini_region_data *reg_data,
1669                                     void *range_ptr, u32 range_len, int idx)
1670 {
1671         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1672         struct iwl_rx_packet *pkt = reg_data->dump_data->fw_pkt;
1673         u32 pkt_len;
1674
1675         if (!pkt)
1676                 return -EIO;
1677
1678         pkt_len = iwl_rx_packet_payload_len(pkt);
1679
1680         memcpy(&range->fw_pkt_hdr, &pkt->hdr, sizeof(range->fw_pkt_hdr));
1681         range->range_data_size = cpu_to_le32(pkt_len);
1682
1683         memcpy(range->data, pkt->data, pkt_len);
1684
1685         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1686 }
1687
1688 static int iwl_dump_ini_imr_iter(struct iwl_fw_runtime *fwrt,
1689                                  struct iwl_dump_ini_region_data *reg_data,
1690                                  void *range_ptr, u32 range_len, int idx)
1691 {
1692         /* read the IMR memory and DMA it to SRAM */
1693         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1694         u64 imr_curr_addr = fwrt->trans->dbg.imr_data.imr_curr_addr;
1695         u32 imr_rem_bytes = fwrt->trans->dbg.imr_data.imr2sram_remainbyte;
1696         u32 sram_addr = fwrt->trans->dbg.imr_data.sram_addr;
1697         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1698         u32 size_to_dump = (imr_rem_bytes > sram_size) ? sram_size : imr_rem_bytes;
1699
1700         range->range_data_size = cpu_to_le32(size_to_dump);
1701         if (iwl_trans_write_imr_mem(fwrt->trans, sram_addr,
1702                                     imr_curr_addr, size_to_dump)) {
1703                 IWL_ERR(fwrt, "WRT_DEBUG: IMR Memory transfer failed\n");
1704                 return -1;
1705         }
1706
1707         fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump;
1708         fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump;
1709
1710         iwl_trans_read_mem_bytes(fwrt->trans, sram_addr, range->data,
1711                                  size_to_dump);
1712         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1713 }
1714
1715 static void *
1716 iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
1717                              struct iwl_dump_ini_region_data *reg_data,
1718                              void *data, u32 data_len)
1719 {
1720         struct iwl_fw_ini_error_dump *dump = data;
1721
1722         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1723
1724         return dump->data;
1725 }
1726
1727 /**
1728  * mask_apply_and_normalize - applies mask on val and normalize the result
1729  *
1730  * @val: value
1731  * @mask: mask to apply and to normalize with
1732  *
1733  * The normalization is based on the first set bit in the mask
1734  *
1735  * Returns: the extracted value
1736  */
1737 static u32 mask_apply_and_normalize(u32 val, u32 mask)
1738 {
1739         return (val & mask) >> (ffs(mask) - 1);
1740 }
1741
1742 static __le32 iwl_get_mon_reg(struct iwl_fw_runtime *fwrt, u32 alloc_id,
1743                               const struct iwl_fw_mon_reg *reg_info)
1744 {
1745         u32 val, offs;
1746
1747         /* The header addresses of DBGCi is calculate as follows:
1748          * DBGC1 address + (0x100 * i)
1749          */
1750         offs = (alloc_id - IWL_FW_INI_ALLOCATION_ID_DBGC1) * 0x100;
1751
1752         if (!reg_info || !reg_info->addr || !reg_info->mask)
1753                 return 0;
1754
1755         val = iwl_read_prph_no_grab(fwrt->trans, reg_info->addr + offs);
1756
1757         return cpu_to_le32(mask_apply_and_normalize(val, reg_info->mask));
1758 }
1759
1760 static void *
1761 iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt, u32 alloc_id,
1762                              struct iwl_fw_ini_monitor_dump *data,
1763                              const struct iwl_fw_mon_regs *addrs)
1764 {
1765         if (!iwl_trans_grab_nic_access(fwrt->trans)) {
1766                 IWL_ERR(fwrt, "Failed to get monitor header\n");
1767                 return NULL;
1768         }
1769
1770         data->write_ptr = iwl_get_mon_reg(fwrt, alloc_id,
1771                                           &addrs->write_ptr);
1772         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
1773                 u32 wrt_ptr = le32_to_cpu(data->write_ptr);
1774
1775                 data->write_ptr = cpu_to_le32(wrt_ptr >> 2);
1776         }
1777         data->cycle_cnt = iwl_get_mon_reg(fwrt, alloc_id,
1778                                           &addrs->cycle_cnt);
1779         data->cur_frag = iwl_get_mon_reg(fwrt, alloc_id,
1780                                          &addrs->cur_frag);
1781
1782         iwl_trans_release_nic_access(fwrt->trans);
1783
1784         data->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1785
1786         return data->data;
1787 }
1788
1789 static void *
1790 iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt,
1791                                   struct iwl_dump_ini_region_data *reg_data,
1792                                   void *data, u32 data_len)
1793 {
1794         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1795         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1796         u32 alloc_id = le32_to_cpu(reg->dram_alloc_id);
1797
1798         return iwl_dump_ini_mon_fill_header(fwrt, alloc_id, mon_dump,
1799                                             &fwrt->trans->cfg->mon_dram_regs);
1800 }
1801
1802 static void *
1803 iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt,
1804                                   struct iwl_dump_ini_region_data *reg_data,
1805                                   void *data, u32 data_len)
1806 {
1807         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1808         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1809         u32 alloc_id = le32_to_cpu(reg->internal_buffer.alloc_id);
1810
1811         return iwl_dump_ini_mon_fill_header(fwrt, alloc_id, mon_dump,
1812                                             &fwrt->trans->cfg->mon_smem_regs);
1813 }
1814
1815 static void *
1816 iwl_dump_ini_mon_dbgi_fill_header(struct iwl_fw_runtime *fwrt,
1817                                   struct iwl_dump_ini_region_data *reg_data,
1818                                   void *data, u32 data_len)
1819 {
1820         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1821
1822         return iwl_dump_ini_mon_fill_header(fwrt,
1823                                             /* no offset calculation later */
1824                                             IWL_FW_INI_ALLOCATION_ID_DBGC1,
1825                                             mon_dump,
1826                                             &fwrt->trans->cfg->mon_dbgi_regs);
1827 }
1828
1829 static void *
1830 iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime *fwrt,
1831                                    struct iwl_dump_ini_region_data *reg_data,
1832                                    void *data, u32 data_len)
1833 {
1834         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1835         struct iwl_fw_ini_err_table_dump *dump = data;
1836
1837         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1838         dump->version = reg->err_table.version;
1839
1840         return dump->data;
1841 }
1842
1843 static void *
1844 iwl_dump_ini_special_mem_fill_header(struct iwl_fw_runtime *fwrt,
1845                                      struct iwl_dump_ini_region_data *reg_data,
1846                                      void *data, u32 data_len)
1847 {
1848         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1849         struct iwl_fw_ini_special_device_memory *dump = data;
1850
1851         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1852         dump->type = reg->special_mem.type;
1853         dump->version = reg->special_mem.version;
1854
1855         return dump->data;
1856 }
1857
1858 static void *
1859 iwl_dump_ini_imr_fill_header(struct iwl_fw_runtime *fwrt,
1860                              struct iwl_dump_ini_region_data *reg_data,
1861                              void *data, u32 data_len)
1862 {
1863         struct iwl_fw_ini_error_dump *dump = data;
1864
1865         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1866
1867         return dump->data;
1868 }
1869
1870 static u32 iwl_dump_ini_mem_ranges(struct iwl_fw_runtime *fwrt,
1871                                    struct iwl_dump_ini_region_data *reg_data)
1872 {
1873         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1874
1875         return iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
1876 }
1877
1878 static u32
1879 iwl_dump_ini_mem_block_ranges(struct iwl_fw_runtime *fwrt,
1880                               struct iwl_dump_ini_region_data *reg_data)
1881 {
1882         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1883         size_t size = sizeof(struct iwl_fw_ini_addr_size);
1884
1885         return iwl_tlv_array_len_with_size(reg_data->reg_tlv, reg, size);
1886 }
1887
1888 static u32 iwl_dump_ini_paging_ranges(struct iwl_fw_runtime *fwrt,
1889                                       struct iwl_dump_ini_region_data *reg_data)
1890 {
1891         if (fwrt->trans->trans_cfg->gen2) {
1892                 if (fwrt->trans->init_dram.paging_cnt)
1893                         return fwrt->trans->init_dram.paging_cnt - 1;
1894                 else
1895                         return 0;
1896         }
1897
1898         return fwrt->num_of_paging_blk;
1899 }
1900
1901 static u32
1902 iwl_dump_ini_mon_dram_ranges(struct iwl_fw_runtime *fwrt,
1903                              struct iwl_dump_ini_region_data *reg_data)
1904 {
1905         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1906         struct iwl_fw_mon *fw_mon;
1907         u32 ranges = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
1908         int i;
1909
1910         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
1911
1912         for (i = 0; i < fw_mon->num_frags; i++) {
1913                 if (!fw_mon->frags[i].size)
1914                         break;
1915
1916                 ranges++;
1917         }
1918
1919         return ranges;
1920 }
1921
1922 static u32 iwl_dump_ini_txf_ranges(struct iwl_fw_runtime *fwrt,
1923                                    struct iwl_dump_ini_region_data *reg_data)
1924 {
1925         u32 num_of_fifos = 0;
1926
1927         while (iwl_ini_txf_iter(fwrt, reg_data, num_of_fifos))
1928                 num_of_fifos++;
1929
1930         return num_of_fifos;
1931 }
1932
1933 static u32 iwl_dump_ini_single_range(struct iwl_fw_runtime *fwrt,
1934                                      struct iwl_dump_ini_region_data *reg_data)
1935 {
1936         return 1;
1937 }
1938
1939 static u32 iwl_dump_ini_imr_ranges(struct iwl_fw_runtime *fwrt,
1940                                    struct iwl_dump_ini_region_data *reg_data)
1941 {
1942         /* range is total number of pages need to copied from
1943          *IMR memory to SRAM and later from SRAM to DRAM
1944          */
1945         u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
1946         u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
1947         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
1948
1949         if (imr_enable == 0 || imr_size == 0 || sram_size == 0) {
1950                 IWL_DEBUG_INFO(fwrt,
1951                                "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n",
1952                                imr_enable, imr_size, sram_size);
1953                 return 0;
1954         }
1955
1956         return((imr_size % sram_size) ? (imr_size / sram_size + 1) : (imr_size / sram_size));
1957 }
1958
1959 static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
1960                                      struct iwl_dump_ini_region_data *reg_data)
1961 {
1962         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1963         u32 size = le32_to_cpu(reg->dev_addr.size);
1964         u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
1965
1966         if (!size || !ranges)
1967                 return 0;
1968
1969         return sizeof(struct iwl_fw_ini_error_dump) + ranges *
1970                 (size + sizeof(struct iwl_fw_ini_error_dump_range));
1971 }
1972
1973 static u32
1974 iwl_dump_ini_mem_block_get_size(struct iwl_fw_runtime *fwrt,
1975                                 struct iwl_dump_ini_region_data *reg_data)
1976 {
1977         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
1978         struct iwl_fw_ini_addr_size *pairs = (void *)reg->addrs;
1979         u32 ranges = iwl_dump_ini_mem_block_ranges(fwrt, reg_data);
1980         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1981         int range;
1982
1983         if (!ranges)
1984                 return 0;
1985
1986         for (range = 0; range < ranges; range++)
1987                 size += le32_to_cpu(pairs[range].size);
1988
1989         return size + ranges * sizeof(struct iwl_fw_ini_error_dump_range);
1990 }
1991
1992 static u32
1993 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime *fwrt,
1994                              struct iwl_dump_ini_region_data *reg_data)
1995 {
1996         int i;
1997         u32 range_header_len = sizeof(struct iwl_fw_ini_error_dump_range);
1998         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1999
2000         /* start from 1 to skip CSS section */
2001         for (i = 1; i <= iwl_dump_ini_paging_ranges(fwrt, reg_data); i++) {
2002                 size += range_header_len;
2003                 if (fwrt->trans->trans_cfg->gen2)
2004                         size += fwrt->trans->init_dram.paging[i].size;
2005                 else
2006                         size += fwrt->fw_paging_db[i].fw_paging_size;
2007         }
2008
2009         return size;
2010 }
2011
2012 static u32
2013 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
2014                                struct iwl_dump_ini_region_data *reg_data)
2015 {
2016         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2017         struct iwl_fw_mon *fw_mon;
2018         u32 size = 0, alloc_id = le32_to_cpu(reg->dram_alloc_id);
2019         int i;
2020
2021         fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];
2022
2023         for (i = 0; i < fw_mon->num_frags; i++) {
2024                 struct iwl_dram_data *frag = &fw_mon->frags[i];
2025
2026                 if (!frag->size)
2027                         break;
2028
2029                 size += sizeof(struct iwl_fw_ini_error_dump_range) + frag->size;
2030         }
2031
2032         if (size)
2033                 size += sizeof(struct iwl_fw_ini_monitor_dump);
2034
2035         return size;
2036 }
2037
2038 static u32
2039 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt,
2040                                struct iwl_dump_ini_region_data *reg_data)
2041 {
2042         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2043         u32 size;
2044
2045         size = le32_to_cpu(reg->internal_buffer.size);
2046         if (!size)
2047                 return 0;
2048
2049         size += sizeof(struct iwl_fw_ini_monitor_dump) +
2050                 sizeof(struct iwl_fw_ini_error_dump_range);
2051
2052         return size;
2053 }
2054
2055 static u32 iwl_dump_ini_mon_dbgi_get_size(struct iwl_fw_runtime *fwrt,
2056                                           struct iwl_dump_ini_region_data *reg_data)
2057 {
2058         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2059         u32 size = le32_to_cpu(reg->dev_addr.size);
2060         u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data);
2061
2062         if (!size || !ranges)
2063                 return 0;
2064
2065         return sizeof(struct iwl_fw_ini_monitor_dump) + ranges *
2066                 (size + sizeof(struct iwl_fw_ini_error_dump_range));
2067 }
2068
2069 static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
2070                                      struct iwl_dump_ini_region_data *reg_data)
2071 {
2072         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2073         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
2074         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
2075         u32 size = 0;
2076         u32 fifo_hdr = sizeof(struct iwl_fw_ini_error_dump_range) +
2077                        registers_num *
2078                        sizeof(struct iwl_fw_ini_error_dump_register);
2079
2080         while (iwl_ini_txf_iter(fwrt, reg_data, size)) {
2081                 size += fifo_hdr;
2082                 if (!reg->fifos.hdr_only)
2083                         size += iter->fifo_size;
2084         }
2085
2086         if (!size)
2087                 return 0;
2088
2089         return size + sizeof(struct iwl_fw_ini_error_dump);
2090 }
2091
2092 static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
2093                                      struct iwl_dump_ini_region_data *reg_data)
2094 {
2095         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2096         struct iwl_ini_rxf_data rx_data;
2097         u32 registers_num = iwl_tlv_array_len(reg_data->reg_tlv, reg, addrs);
2098         u32 size = sizeof(struct iwl_fw_ini_error_dump) +
2099                 sizeof(struct iwl_fw_ini_error_dump_range) +
2100                 registers_num * sizeof(struct iwl_fw_ini_error_dump_register);
2101
2102         if (reg->fifos.hdr_only)
2103                 return size;
2104
2105         iwl_ini_get_rxf_data(fwrt, reg_data, &rx_data);
2106         size += rx_data.size;
2107
2108         return size;
2109 }
2110
2111 static u32
2112 iwl_dump_ini_err_table_get_size(struct iwl_fw_runtime *fwrt,
2113                                 struct iwl_dump_ini_region_data *reg_data)
2114 {
2115         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2116         u32 size = le32_to_cpu(reg->err_table.size);
2117
2118         if (size)
2119                 size += sizeof(struct iwl_fw_ini_err_table_dump) +
2120                         sizeof(struct iwl_fw_ini_error_dump_range);
2121
2122         return size;
2123 }
2124
2125 static u32
2126 iwl_dump_ini_special_mem_get_size(struct iwl_fw_runtime *fwrt,
2127                                   struct iwl_dump_ini_region_data *reg_data)
2128 {
2129         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2130         u32 size = le32_to_cpu(reg->special_mem.size);
2131
2132         if (size)
2133                 size += sizeof(struct iwl_fw_ini_special_device_memory) +
2134                         sizeof(struct iwl_fw_ini_error_dump_range);
2135
2136         return size;
2137 }
2138
2139 static u32
2140 iwl_dump_ini_fw_pkt_get_size(struct iwl_fw_runtime *fwrt,
2141                              struct iwl_dump_ini_region_data *reg_data)
2142 {
2143         u32 size = 0;
2144
2145         if (!reg_data->dump_data->fw_pkt)
2146                 return 0;
2147
2148         size += iwl_rx_packet_payload_len(reg_data->dump_data->fw_pkt);
2149         if (size)
2150                 size += sizeof(struct iwl_fw_ini_error_dump) +
2151                         sizeof(struct iwl_fw_ini_error_dump_range);
2152
2153         return size;
2154 }
2155
2156 static u32
2157 iwl_dump_ini_imr_get_size(struct iwl_fw_runtime *fwrt,
2158                           struct iwl_dump_ini_region_data *reg_data)
2159 {
2160         u32 ranges = 0;
2161         u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable;
2162         u32 imr_size = fwrt->trans->dbg.imr_data.imr_size;
2163         u32 sram_size = fwrt->trans->dbg.imr_data.sram_size;
2164
2165         if (imr_enable == 0 || imr_size == 0 || sram_size == 0) {
2166                 IWL_DEBUG_INFO(fwrt,
2167                                "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n",
2168                                imr_enable, imr_size, sram_size);
2169                 return 0;
2170         }
2171         ranges = iwl_dump_ini_imr_ranges(fwrt, reg_data);
2172         if (!ranges) {
2173                 IWL_ERR(fwrt, "WRT: ranges :=%d\n", ranges);
2174                 return 0;
2175         }
2176         imr_size += sizeof(struct iwl_fw_ini_error_dump) +
2177                 ranges * sizeof(struct iwl_fw_ini_error_dump_range);
2178         return imr_size;
2179 }
2180
2181 /**
2182  * struct iwl_dump_ini_mem_ops - ini memory dump operations
2183  * @get_num_of_ranges: returns the number of memory ranges in the region.
2184  * @get_size: returns the total size of the region.
2185  * @fill_mem_hdr: fills region type specific headers and returns pointer to
2186  *      the first range or NULL if failed to fill headers.
2187  * @fill_range: copies a given memory range into the dump.
2188  *      Returns the size of the range or negative error value otherwise.
2189  */
2190 struct iwl_dump_ini_mem_ops {
2191         u32 (*get_num_of_ranges)(struct iwl_fw_runtime *fwrt,
2192                                  struct iwl_dump_ini_region_data *reg_data);
2193         u32 (*get_size)(struct iwl_fw_runtime *fwrt,
2194                         struct iwl_dump_ini_region_data *reg_data);
2195         void *(*fill_mem_hdr)(struct iwl_fw_runtime *fwrt,
2196                               struct iwl_dump_ini_region_data *reg_data,
2197                               void *data, u32 data_len);
2198         int (*fill_range)(struct iwl_fw_runtime *fwrt,
2199                           struct iwl_dump_ini_region_data *reg_data,
2200                           void *range, u32 range_len, int idx);
2201 };
2202
2203 /**
2204  * iwl_dump_ini_mem - dump memory region
2205  *
2206  * @fwrt: fw runtime struct
2207  * @list: list to add the dump tlv to
2208  * @reg_data: memory region
2209  * @ops: memory dump operations
2210  *
2211  * Creates a dump tlv and copy a memory region into it.
2212  *
2213  * Returns: the size of the current dump tlv or 0 if failed
2214  */
2215 static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list,
2216                             struct iwl_dump_ini_region_data *reg_data,
2217                             const struct iwl_dump_ini_mem_ops *ops)
2218 {
2219         struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
2220         struct iwl_fw_ini_dump_entry *entry;
2221         struct iwl_fw_ini_error_dump_data *tlv;
2222         struct iwl_fw_ini_error_dump_header *header;
2223         u32 type = reg->type;
2224         u32 id = le32_get_bits(reg->id, IWL_FW_INI_REGION_ID_MASK);
2225         u32 num_of_ranges, i, size;
2226         u8 *range;
2227         u32 free_size;
2228         u64 header_size;
2229         u32 dump_policy = IWL_FW_INI_DUMP_VERBOSE;
2230
2231         IWL_DEBUG_FW(fwrt, "WRT: Collecting region: dump type=%d, id=%d, type=%d\n",
2232                      dump_policy, id, type);
2233
2234         if (le32_to_cpu(reg->hdr.version) >= 2) {
2235                 u32 dp = le32_get_bits(reg->id,
2236                                        IWL_FW_INI_REGION_DUMP_POLICY_MASK);
2237
2238                 if (dump_policy == IWL_FW_INI_DUMP_VERBOSE &&
2239                     !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT)) {
2240                         IWL_DEBUG_FW(fwrt,
2241                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2242                                      dump_policy, dp);
2243                         return 0;
2244                 } else if (dump_policy == IWL_FW_INI_DUMP_MEDIUM &&
2245                            !(dp & IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB)) {
2246                         IWL_DEBUG_FW(fwrt,
2247                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2248                                      dump_policy, dp);
2249                         return 0;
2250                 } else if (dump_policy == IWL_FW_INI_DUMP_BRIEF &&
2251                            !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB)) {
2252                         IWL_DEBUG_FW(fwrt,
2253                                      "WRT: no dump - type %d and policy mismatch=%d\n",
2254                                      dump_policy, dp);
2255                         return 0;
2256                 }
2257         }
2258
2259         if (!ops->get_num_of_ranges || !ops->get_size || !ops->fill_mem_hdr ||
2260             !ops->fill_range) {
2261                 IWL_DEBUG_FW(fwrt, "WRT: no ops for collecting data\n");
2262                 return 0;
2263         }
2264
2265         size = ops->get_size(fwrt, reg_data);
2266
2267         if (size < sizeof(*header)) {
2268                 IWL_DEBUG_FW(fwrt, "WRT: size didn't include space for header\n");
2269                 return 0;
2270         }
2271
2272         entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + size);
2273         if (!entry)
2274                 return 0;
2275
2276         entry->size = sizeof(*tlv) + size;
2277
2278         tlv = (void *)entry->data;
2279         tlv->type = reg->type;
2280         tlv->sub_type = reg->sub_type;
2281         tlv->sub_type_ver = reg->sub_type_ver;
2282         tlv->reserved = reg->reserved;
2283         tlv->len = cpu_to_le32(size);
2284
2285         num_of_ranges = ops->get_num_of_ranges(fwrt, reg_data);
2286
2287         header = (void *)tlv->data;
2288         header->region_id = cpu_to_le32(id);
2289         header->num_of_ranges = cpu_to_le32(num_of_ranges);
2290         header->name_len = cpu_to_le32(IWL_FW_INI_MAX_NAME);
2291         memcpy(header->name, reg->name, IWL_FW_INI_MAX_NAME);
2292
2293         free_size = size;
2294         range = ops->fill_mem_hdr(fwrt, reg_data, header, free_size);
2295         if (!range) {
2296                 IWL_ERR(fwrt,
2297                         "WRT: Failed to fill region header: id=%d, type=%d\n",
2298                         id, type);
2299                 goto out_err;
2300         }
2301
2302         header_size = range - (u8 *)header;
2303
2304         if (WARN(header_size > free_size,
2305                  "header size %llu > free_size %d",
2306                  header_size, free_size)) {
2307                 IWL_ERR(fwrt,
2308                         "WRT: fill_mem_hdr used more than given free_size\n");
2309                 goto out_err;
2310         }
2311
2312         free_size -= header_size;
2313
2314         for (i = 0; i < num_of_ranges; i++) {
2315                 int range_size = ops->fill_range(fwrt, reg_data, range,
2316                                                  free_size, i);
2317
2318                 if (range_size < 0) {
2319                         IWL_ERR(fwrt,
2320                                 "WRT: Failed to dump region: id=%d, type=%d\n",
2321                                 id, type);
2322                         goto out_err;
2323                 }
2324
2325                 if (WARN(range_size > free_size, "range_size %d > free_size %d",
2326                          range_size, free_size)) {
2327                         IWL_ERR(fwrt,
2328                                 "WRT: fill_raged used more than given free_size\n");
2329                         goto out_err;
2330                 }
2331
2332                 free_size -= range_size;
2333                 range = range + range_size;
2334         }
2335
2336         list_add_tail(&entry->list, list);
2337
2338         return entry->size;
2339
2340 out_err:
2341         vfree(entry);
2342
2343         return 0;
2344 }
2345
2346 static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
2347                              struct iwl_fw_ini_trigger_tlv *trigger,
2348                              struct list_head *list)
2349 {
2350         struct iwl_fw_ini_dump_entry *entry;
2351         struct iwl_fw_error_dump_data *tlv;
2352         struct iwl_fw_ini_dump_info *dump;
2353         struct iwl_dbg_tlv_node *node;
2354         struct iwl_fw_ini_dump_cfg_name *cfg_name;
2355         u32 size = sizeof(*tlv) + sizeof(*dump);
2356         u32 num_of_cfg_names = 0;
2357         u32 hw_type;
2358
2359         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2360                 size += sizeof(*cfg_name);
2361                 num_of_cfg_names++;
2362         }
2363
2364         entry = vzalloc(sizeof(*entry) + size);
2365         if (!entry)
2366                 return 0;
2367
2368         entry->size = size;
2369
2370         tlv = (void *)entry->data;
2371         tlv->type = cpu_to_le32(IWL_INI_DUMP_INFO_TYPE);
2372         tlv->len = cpu_to_le32(size - sizeof(*tlv));
2373
2374         dump = (void *)tlv->data;
2375
2376         dump->version = cpu_to_le32(IWL_INI_DUMP_VER);
2377         dump->time_point = trigger->time_point;
2378         dump->trigger_reason = trigger->trigger_reason;
2379         dump->external_cfg_state =
2380                 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
2381
2382         dump->ver_type = cpu_to_le32(fwrt->dump.fw_ver.type);
2383         dump->ver_subtype = cpu_to_le32(fwrt->dump.fw_ver.subtype);
2384
2385         dump->hw_step = cpu_to_le32(fwrt->trans->hw_rev_step);
2386
2387         /*
2388          * Several HWs all have type == 0x42, so we'll override this value
2389          * according to the detected HW
2390          */
2391         hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
2392         if (hw_type == IWL_AX210_HW_TYPE) {
2393                 u32 prph_val = iwl_read_umac_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
2394                 u32 is_jacket = !!(prph_val & WFPM_OTP_CFG1_IS_JACKET_BIT);
2395                 u32 is_cdb = !!(prph_val & WFPM_OTP_CFG1_IS_CDB_BIT);
2396                 u32 masked_bits = is_jacket | (is_cdb << 1);
2397
2398                 /*
2399                  * The HW type depends on certain bits in this case, so add
2400                  * these bits to the HW type. We won't have collisions since we
2401                  * add these bits after the highest possible bit in the mask.
2402                  */
2403                 hw_type |= masked_bits << IWL_AX210_HW_TYPE_ADDITION_SHIFT;
2404         }
2405         dump->hw_type = cpu_to_le32(hw_type);
2406
2407         dump->rf_id_flavor =
2408                 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt->trans->hw_rf_id));
2409         dump->rf_id_dash = cpu_to_le32(CSR_HW_RFID_DASH(fwrt->trans->hw_rf_id));
2410         dump->rf_id_step = cpu_to_le32(CSR_HW_RFID_STEP(fwrt->trans->hw_rf_id));
2411         dump->rf_id_type = cpu_to_le32(CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id));
2412
2413         dump->lmac_major = cpu_to_le32(fwrt->dump.fw_ver.lmac_major);
2414         dump->lmac_minor = cpu_to_le32(fwrt->dump.fw_ver.lmac_minor);
2415         dump->umac_major = cpu_to_le32(fwrt->dump.fw_ver.umac_major);
2416         dump->umac_minor = cpu_to_le32(fwrt->dump.fw_ver.umac_minor);
2417
2418         dump->fw_mon_mode = cpu_to_le32(fwrt->trans->dbg.ini_dest);
2419         dump->regions_mask = trigger->regions_mask &
2420                              ~cpu_to_le64(fwrt->trans->dbg.unsupported_region_msk);
2421
2422         dump->build_tag_len = cpu_to_le32(sizeof(dump->build_tag));
2423         memcpy(dump->build_tag, fwrt->fw->human_readable,
2424                sizeof(dump->build_tag));
2425
2426         cfg_name = dump->cfg_names;
2427         dump->num_of_cfg_names = cpu_to_le32(num_of_cfg_names);
2428         list_for_each_entry(node, &fwrt->trans->dbg.debug_info_tlv_list, list) {
2429                 struct iwl_fw_ini_debug_info_tlv *debug_info =
2430                         (void *)node->tlv.data;
2431
2432                 BUILD_BUG_ON(sizeof(cfg_name->cfg_name) !=
2433                              sizeof(debug_info->debug_cfg_name));
2434
2435                 cfg_name->image_type = debug_info->image_type;
2436                 cfg_name->cfg_name_len =
2437                         cpu_to_le32(sizeof(cfg_name->cfg_name));
2438                 memcpy(cfg_name->cfg_name, debug_info->debug_cfg_name,
2439                        sizeof(cfg_name->cfg_name));
2440                 cfg_name++;
2441         }
2442
2443         /* add dump info TLV to the beginning of the list since it needs to be
2444          * the first TLV in the dump
2445          */
2446         list_add(&entry->list, list);
2447
2448         return entry->size;
2449 }
2450
2451 static u32 iwl_dump_ini_file_name_info(struct iwl_fw_runtime *fwrt,
2452                                        struct list_head *list)
2453 {
2454         struct iwl_fw_ini_dump_entry *entry;
2455         struct iwl_dump_file_name_info *tlv;
2456         u32 len = strnlen(fwrt->trans->dbg.dump_file_name_ext,
2457                           IWL_FW_INI_MAX_NAME);
2458
2459         if (!fwrt->trans->dbg.dump_file_name_ext_valid)
2460                 return 0;
2461
2462         entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + len);
2463         if (!entry)
2464                 return 0;
2465
2466         entry->size = sizeof(*tlv) + len;
2467
2468         tlv = (void *)entry->data;
2469         tlv->type = cpu_to_le32(IWL_INI_DUMP_NAME_TYPE);
2470         tlv->len = cpu_to_le32(len);
2471         memcpy(tlv->data, fwrt->trans->dbg.dump_file_name_ext, len);
2472
2473         /* add the dump file name extension tlv to the list */
2474         list_add_tail(&entry->list, list);
2475
2476         fwrt->trans->dbg.dump_file_name_ext_valid = false;
2477
2478         return entry->size;
2479 }
2480
2481 static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = {
2482         [IWL_FW_INI_REGION_INVALID] = {},
2483         [IWL_FW_INI_REGION_INTERNAL_BUFFER] = {
2484                 .get_num_of_ranges = iwl_dump_ini_single_range,
2485                 .get_size = iwl_dump_ini_mon_smem_get_size,
2486                 .fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header,
2487                 .fill_range = iwl_dump_ini_mon_smem_iter,
2488         },
2489         [IWL_FW_INI_REGION_DRAM_BUFFER] = {
2490                 .get_num_of_ranges = iwl_dump_ini_mon_dram_ranges,
2491                 .get_size = iwl_dump_ini_mon_dram_get_size,
2492                 .fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header,
2493                 .fill_range = iwl_dump_ini_mon_dram_iter,
2494         },
2495         [IWL_FW_INI_REGION_TXF] = {
2496                 .get_num_of_ranges = iwl_dump_ini_txf_ranges,
2497                 .get_size = iwl_dump_ini_txf_get_size,
2498                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2499                 .fill_range = iwl_dump_ini_txf_iter,
2500         },
2501         [IWL_FW_INI_REGION_RXF] = {
2502                 .get_num_of_ranges = iwl_dump_ini_single_range,
2503                 .get_size = iwl_dump_ini_rxf_get_size,
2504                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2505                 .fill_range = iwl_dump_ini_rxf_iter,
2506         },
2507         [IWL_FW_INI_REGION_LMAC_ERROR_TABLE] = {
2508                 .get_num_of_ranges = iwl_dump_ini_single_range,
2509                 .get_size = iwl_dump_ini_err_table_get_size,
2510                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2511                 .fill_range = iwl_dump_ini_err_table_iter,
2512         },
2513         [IWL_FW_INI_REGION_UMAC_ERROR_TABLE] = {
2514                 .get_num_of_ranges = iwl_dump_ini_single_range,
2515                 .get_size = iwl_dump_ini_err_table_get_size,
2516                 .fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
2517                 .fill_range = iwl_dump_ini_err_table_iter,
2518         },
2519         [IWL_FW_INI_REGION_RSP_OR_NOTIF] = {
2520                 .get_num_of_ranges = iwl_dump_ini_single_range,
2521                 .get_size = iwl_dump_ini_fw_pkt_get_size,
2522                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2523                 .fill_range = iwl_dump_ini_fw_pkt_iter,
2524         },
2525         [IWL_FW_INI_REGION_DEVICE_MEMORY] = {
2526                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2527                 .get_size = iwl_dump_ini_mem_get_size,
2528                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2529                 .fill_range = iwl_dump_ini_dev_mem_iter,
2530         },
2531         [IWL_FW_INI_REGION_PERIPHERY_MAC] = {
2532                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2533                 .get_size = iwl_dump_ini_mem_get_size,
2534                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2535                 .fill_range = iwl_dump_ini_prph_mac_iter,
2536         },
2537         [IWL_FW_INI_REGION_PERIPHERY_PHY] = {
2538                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2539                 .get_size = iwl_dump_ini_mem_get_size,
2540                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2541                 .fill_range = iwl_dump_ini_prph_phy_iter,
2542         },
2543         [IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE] = {
2544                 .get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
2545                 .get_size = iwl_dump_ini_mem_block_get_size,
2546                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2547                 .fill_range = iwl_dump_ini_prph_mac_block_iter,
2548         },
2549         [IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE] = {
2550                 .get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
2551                 .get_size = iwl_dump_ini_mem_block_get_size,
2552                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2553                 .fill_range = iwl_dump_ini_prph_phy_block_iter,
2554         },
2555         [IWL_FW_INI_REGION_PERIPHERY_AUX] = {},
2556         [IWL_FW_INI_REGION_PAGING] = {
2557                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2558                 .get_num_of_ranges = iwl_dump_ini_paging_ranges,
2559                 .get_size = iwl_dump_ini_paging_get_size,
2560                 .fill_range = iwl_dump_ini_paging_iter,
2561         },
2562         [IWL_FW_INI_REGION_CSR] = {
2563                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2564                 .get_size = iwl_dump_ini_mem_get_size,
2565                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2566                 .fill_range = iwl_dump_ini_csr_iter,
2567         },
2568         [IWL_FW_INI_REGION_DRAM_IMR] = {
2569                 .get_num_of_ranges = iwl_dump_ini_imr_ranges,
2570                 .get_size = iwl_dump_ini_imr_get_size,
2571                 .fill_mem_hdr = iwl_dump_ini_imr_fill_header,
2572                 .fill_range = iwl_dump_ini_imr_iter,
2573         },
2574         [IWL_FW_INI_REGION_PCI_IOSF_CONFIG] = {
2575                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2576                 .get_size = iwl_dump_ini_mem_get_size,
2577                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2578                 .fill_range = iwl_dump_ini_config_iter,
2579         },
2580         [IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY] = {
2581                 .get_num_of_ranges = iwl_dump_ini_single_range,
2582                 .get_size = iwl_dump_ini_special_mem_get_size,
2583                 .fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
2584                 .fill_range = iwl_dump_ini_special_mem_iter,
2585         },
2586         [IWL_FW_INI_REGION_DBGI_SRAM] = {
2587                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2588                 .get_size = iwl_dump_ini_mon_dbgi_get_size,
2589                 .fill_mem_hdr = iwl_dump_ini_mon_dbgi_fill_header,
2590                 .fill_range = iwl_dump_ini_dbgi_sram_iter,
2591         },
2592         [IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP] = {
2593                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
2594                 .get_size = iwl_dump_ini_mem_get_size,
2595                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
2596                 .fill_range = iwl_dump_ini_prph_snps_dphyip_iter,
2597         },
2598 };
2599
2600 static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
2601                                 struct iwl_fwrt_dump_data *dump_data,
2602                                 struct list_head *list)
2603 {
2604         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2605         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trigger->time_point);
2606         struct iwl_dump_ini_region_data reg_data = {
2607                 .dump_data = dump_data,
2608         };
2609         struct iwl_dump_ini_region_data imr_reg_data = {
2610                 .dump_data = dump_data,
2611         };
2612         int i;
2613         u32 size = 0;
2614         u64 regions_mask = le64_to_cpu(trigger->regions_mask) &
2615                            ~(fwrt->trans->dbg.unsupported_region_msk);
2616
2617         BUILD_BUG_ON(sizeof(trigger->regions_mask) != sizeof(regions_mask));
2618         BUILD_BUG_ON((sizeof(trigger->regions_mask) * BITS_PER_BYTE) <
2619                      ARRAY_SIZE(fwrt->trans->dbg.active_regions));
2620
2621         for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions); i++) {
2622                 u32 reg_type;
2623                 struct iwl_fw_ini_region_tlv *reg;
2624
2625                 if (!(BIT_ULL(i) & regions_mask))
2626                         continue;
2627
2628                 reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2629                 if (!reg_data.reg_tlv) {
2630                         IWL_WARN(fwrt,
2631                                  "WRT: Unassigned region id %d, skipping\n", i);
2632                         continue;
2633                 }
2634
2635                 reg = (void *)reg_data.reg_tlv->data;
2636                 reg_type = reg->type;
2637                 if (reg_type >= ARRAY_SIZE(iwl_dump_ini_region_ops))
2638                         continue;
2639
2640                 if ((reg_type == IWL_FW_INI_REGION_PERIPHERY_PHY ||
2641                      reg_type == IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE ||
2642                      reg_type == IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP) &&
2643                     tp_id != IWL_FW_INI_TIME_POINT_FW_ASSERT) {
2644                         IWL_WARN(fwrt,
2645                                  "WRT: trying to collect phy prph at time point: %d, skipping\n",
2646                                  tp_id);
2647                         continue;
2648                 }
2649                 /*
2650                  * DRAM_IMR can be collected only for FW/HW error timepoint
2651                  * when fw is not alive. In addition, it must be collected
2652                  * lastly as it overwrites SRAM that can possibly contain
2653                  * debug data which also need to be collected.
2654                  */
2655                 if (reg_type == IWL_FW_INI_REGION_DRAM_IMR) {
2656                         if (tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT ||
2657                             tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR)
2658                                 imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i];
2659                         else
2660                                 IWL_INFO(fwrt,
2661                                          "WRT: trying to collect DRAM_IMR at time point: %d, skipping\n",
2662                                          tp_id);
2663                 /* continue to next region */
2664                         continue;
2665                 }
2666
2667
2668                 size += iwl_dump_ini_mem(fwrt, list, &reg_data,
2669                                          &iwl_dump_ini_region_ops[reg_type]);
2670         }
2671         /* collect DRAM_IMR region in the last */
2672         if (imr_reg_data.reg_tlv)
2673                 size += iwl_dump_ini_mem(fwrt, list, &reg_data,
2674                                          &iwl_dump_ini_region_ops[IWL_FW_INI_REGION_DRAM_IMR]);
2675
2676         if (size) {
2677                 size += iwl_dump_ini_file_name_info(fwrt, list);
2678                 size += iwl_dump_ini_info(fwrt, trigger, list);
2679         }
2680
2681         return size;
2682 }
2683
2684 static bool iwl_fw_ini_trigger_on(struct iwl_fw_runtime *fwrt,
2685                                   struct iwl_fw_ini_trigger_tlv *trig)
2686 {
2687         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
2688         u32 usec = le32_to_cpu(trig->ignore_consec);
2689
2690         if (!iwl_trans_dbg_ini_valid(fwrt->trans) ||
2691             tp_id == IWL_FW_INI_TIME_POINT_INVALID ||
2692             tp_id >= IWL_FW_INI_TIME_POINT_NUM ||
2693             iwl_fw_dbg_no_trig_window(fwrt, tp_id, usec))
2694                 return false;
2695
2696         return true;
2697 }
2698
2699 static u32 iwl_dump_ini_file_gen(struct iwl_fw_runtime *fwrt,
2700                                  struct iwl_fwrt_dump_data *dump_data,
2701                                  struct list_head *list)
2702 {
2703         struct iwl_fw_ini_trigger_tlv *trigger = dump_data->trig;
2704         struct iwl_fw_ini_dump_entry *entry;
2705         struct iwl_fw_ini_dump_file_hdr *hdr;
2706         u32 size;
2707
2708         if (!trigger || !iwl_fw_ini_trigger_on(fwrt, trigger) ||
2709             !le64_to_cpu(trigger->regions_mask))
2710                 return 0;
2711
2712         entry = vzalloc(sizeof(*entry) + sizeof(*hdr));
2713         if (!entry)
2714                 return 0;
2715
2716         entry->size = sizeof(*hdr);
2717
2718         size = iwl_dump_ini_trigger(fwrt, dump_data, list);
2719         if (!size) {
2720                 vfree(entry);
2721                 return 0;
2722         }
2723
2724         hdr = (void *)entry->data;
2725         hdr->barker = cpu_to_le32(IWL_FW_INI_ERROR_DUMP_BARKER);
2726         hdr->file_len = cpu_to_le32(size + entry->size);
2727
2728         list_add(&entry->list, list);
2729
2730         return le32_to_cpu(hdr->file_len);
2731 }
2732
2733 static inline void iwl_fw_free_dump_desc(struct iwl_fw_runtime *fwrt,
2734                                          const struct iwl_fw_dump_desc *desc)
2735 {
2736         if (desc && desc != &iwl_dump_desc_assert)
2737                 kfree(desc);
2738
2739         fwrt->dump.lmac_err_id[0] = 0;
2740         if (fwrt->smem_cfg.num_lmacs > 1)
2741                 fwrt->dump.lmac_err_id[1] = 0;
2742         fwrt->dump.umac_err_id = 0;
2743 }
2744
2745 static void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt,
2746                               struct iwl_fwrt_dump_data *dump_data)
2747 {
2748         struct iwl_fw_dump_ptrs fw_error_dump = {};
2749         struct iwl_fw_error_dump_file *dump_file;
2750         struct scatterlist *sg_dump_data;
2751         u32 file_len;
2752         u32 dump_mask = fwrt->fw->dbg.dump_mask;
2753
2754         dump_file = iwl_fw_error_dump_file(fwrt, &fw_error_dump, dump_data);
2755         if (!dump_file)
2756                 return;
2757
2758         if (dump_data->monitor_only)
2759                 dump_mask &= BIT(IWL_FW_ERROR_DUMP_FW_MONITOR);
2760
2761         fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask,
2762                                                       fwrt->sanitize_ops,
2763                                                       fwrt->sanitize_ctx);
2764         file_len = le32_to_cpu(dump_file->file_len);
2765         fw_error_dump.fwrt_len = file_len;
2766
2767         if (fw_error_dump.trans_ptr) {
2768                 file_len += fw_error_dump.trans_ptr->len;
2769                 dump_file->file_len = cpu_to_le32(file_len);
2770         }
2771
2772         sg_dump_data = alloc_sgtable(file_len);
2773         if (sg_dump_data) {
2774                 sg_pcopy_from_buffer(sg_dump_data,
2775                                      sg_nents(sg_dump_data),
2776                                      fw_error_dump.fwrt_ptr,
2777                                      fw_error_dump.fwrt_len, 0);
2778                 if (fw_error_dump.trans_ptr)
2779                         sg_pcopy_from_buffer(sg_dump_data,
2780                                              sg_nents(sg_dump_data),
2781                                              fw_error_dump.trans_ptr->data,
2782                                              fw_error_dump.trans_ptr->len,
2783                                              fw_error_dump.fwrt_len);
2784                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2785                                GFP_KERNEL);
2786         }
2787         vfree(fw_error_dump.fwrt_ptr);
2788         vfree(fw_error_dump.trans_ptr);
2789 }
2790
2791 static void iwl_dump_ini_list_free(struct list_head *list)
2792 {
2793         while (!list_empty(list)) {
2794                 struct iwl_fw_ini_dump_entry *entry =
2795                         list_entry(list->next, typeof(*entry), list);
2796
2797                 list_del(&entry->list);
2798                 vfree(entry);
2799         }
2800 }
2801
2802 static void iwl_fw_error_dump_data_free(struct iwl_fwrt_dump_data *dump_data)
2803 {
2804         dump_data->trig = NULL;
2805         kfree(dump_data->fw_pkt);
2806         dump_data->fw_pkt = NULL;
2807 }
2808
2809 static void iwl_fw_error_ini_dump(struct iwl_fw_runtime *fwrt,
2810                                   struct iwl_fwrt_dump_data *dump_data)
2811 {
2812         LIST_HEAD(dump_list);
2813         struct scatterlist *sg_dump_data;
2814         u32 file_len = iwl_dump_ini_file_gen(fwrt, dump_data, &dump_list);
2815
2816         if (!file_len)
2817                 return;
2818
2819         sg_dump_data = alloc_sgtable(file_len);
2820         if (sg_dump_data) {
2821                 struct iwl_fw_ini_dump_entry *entry;
2822                 int sg_entries = sg_nents(sg_dump_data);
2823                 u32 offs = 0;
2824
2825                 list_for_each_entry(entry, &dump_list, list) {
2826                         sg_pcopy_from_buffer(sg_dump_data, sg_entries,
2827                                              entry->data, entry->size, offs);
2828                         offs += entry->size;
2829                 }
2830                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2831                                GFP_KERNEL);
2832         }
2833         iwl_dump_ini_list_free(&dump_list);
2834 }
2835
2836 const struct iwl_fw_dump_desc iwl_dump_desc_assert = {
2837         .trig_desc = {
2838                 .type = cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT),
2839         },
2840 };
2841 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert);
2842
2843 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
2844                             const struct iwl_fw_dump_desc *desc,
2845                             bool monitor_only,
2846                             unsigned int delay)
2847 {
2848         struct iwl_fwrt_wk_data *wk_data;
2849         unsigned long idx;
2850
2851         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2852                 iwl_fw_free_dump_desc(fwrt, desc);
2853                 return 0;
2854         }
2855
2856         /*
2857          * Check there is an available worker.
2858          * ffz return value is undefined if no zero exists,
2859          * so check against ~0UL first.
2860          */
2861         if (fwrt->dump.active_wks == ~0UL)
2862                 return -EBUSY;
2863
2864         idx = ffz(fwrt->dump.active_wks);
2865
2866         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
2867             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
2868                 return -EBUSY;
2869
2870         wk_data = &fwrt->dump.wks[idx];
2871
2872         if (WARN_ON(wk_data->dump_data.desc))
2873                 iwl_fw_free_dump_desc(fwrt, wk_data->dump_data.desc);
2874
2875         wk_data->dump_data.desc = desc;
2876         wk_data->dump_data.monitor_only = monitor_only;
2877
2878         IWL_WARN(fwrt, "Collecting data: trigger %d fired.\n",
2879                  le32_to_cpu(desc->trig_desc.type));
2880
2881         queue_delayed_work(system_unbound_wq, &wk_data->wk,
2882                            usecs_to_jiffies(delay));
2883
2884         return 0;
2885 }
2886 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc);
2887
2888 int iwl_fw_dbg_error_collect(struct iwl_fw_runtime *fwrt,
2889                              enum iwl_fw_dbg_trigger trig_type)
2890 {
2891         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status))
2892                 return -EIO;
2893
2894         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2895                 if (trig_type != FW_DBG_TRIGGER_ALIVE_TIMEOUT &&
2896                     trig_type != FW_DBG_TRIGGER_DRIVER)
2897                         return -EIO;
2898
2899                 iwl_dbg_tlv_time_point(fwrt,
2900                                        IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,
2901                                        NULL);
2902         } else {
2903                 struct iwl_fw_dump_desc *iwl_dump_error_desc;
2904                 int ret;
2905
2906                 iwl_dump_error_desc =
2907                         kmalloc(sizeof(*iwl_dump_error_desc), GFP_KERNEL);
2908
2909                 if (!iwl_dump_error_desc)
2910                         return -ENOMEM;
2911
2912                 iwl_dump_error_desc->trig_desc.type = cpu_to_le32(trig_type);
2913                 iwl_dump_error_desc->len = 0;
2914
2915                 ret = iwl_fw_dbg_collect_desc(fwrt, iwl_dump_error_desc,
2916                                               false, 0);
2917                 if (ret) {
2918                         kfree(iwl_dump_error_desc);
2919                         return ret;
2920                 }
2921         }
2922
2923         iwl_trans_sync_nmi(fwrt->trans);
2924
2925         return 0;
2926 }
2927 IWL_EXPORT_SYMBOL(iwl_fw_dbg_error_collect);
2928
2929 int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
2930                        enum iwl_fw_dbg_trigger trig,
2931                        const char *str, size_t len,
2932                        struct iwl_fw_dbg_trigger_tlv *trigger)
2933 {
2934         struct iwl_fw_dump_desc *desc;
2935         unsigned int delay = 0;
2936         bool monitor_only = false;
2937
2938         if (trigger) {
2939                 u16 occurrences = le16_to_cpu(trigger->occurrences) - 1;
2940
2941                 if (!le16_to_cpu(trigger->occurrences))
2942                         return 0;
2943
2944                 if (trigger->flags & IWL_FW_DBG_FORCE_RESTART) {
2945                         IWL_WARN(fwrt, "Force restart: trigger %d fired.\n",
2946                                  trig);
2947                         iwl_force_nmi(fwrt->trans);
2948                         return 0;
2949                 }
2950
2951                 trigger->occurrences = cpu_to_le16(occurrences);
2952                 monitor_only = trigger->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY;
2953
2954                 /* convert msec to usec */
2955                 delay = le32_to_cpu(trigger->stop_delay) * USEC_PER_MSEC;
2956         }
2957
2958         desc = kzalloc(struct_size(desc, trig_desc.data, len), GFP_ATOMIC);
2959         if (!desc)
2960                 return -ENOMEM;
2961
2962
2963         desc->len = len;
2964         desc->trig_desc.type = cpu_to_le32(trig);
2965         memcpy(desc->trig_desc.data, str, len);
2966
2967         return iwl_fw_dbg_collect_desc(fwrt, desc, monitor_only, delay);
2968 }
2969 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect);
2970
2971 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime *fwrt,
2972                             struct iwl_fw_dbg_trigger_tlv *trigger,
2973                             const char *fmt, ...)
2974 {
2975         int ret, len = 0;
2976         char buf[64];
2977
2978         if (iwl_trans_dbg_ini_valid(fwrt->trans))
2979                 return 0;
2980
2981         if (fmt) {
2982                 va_list ap;
2983
2984                 buf[sizeof(buf) - 1] = '\0';
2985
2986                 va_start(ap, fmt);
2987                 vsnprintf(buf, sizeof(buf), fmt, ap);
2988                 va_end(ap);
2989
2990                 /* check for truncation */
2991                 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
2992                         buf[sizeof(buf) - 1] = '\0';
2993
2994                 len = strlen(buf) + 1;
2995         }
2996
2997         ret = iwl_fw_dbg_collect(fwrt, le32_to_cpu(trigger->id), buf, len,
2998                                  trigger);
2999
3000         if (ret)
3001                 return ret;
3002
3003         return 0;
3004 }
3005 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig);
3006
3007 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id)
3008 {
3009         u8 *ptr;
3010         int ret;
3011         int i;
3012
3013         if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
3014                       "Invalid configuration %d\n", conf_id))
3015                 return -EINVAL;
3016
3017         /* EARLY START - firmware's configuration is hard coded */
3018         if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
3019              !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
3020             conf_id == FW_DBG_START_FROM_ALIVE)
3021                 return 0;
3022
3023         if (!fwrt->fw->dbg.conf_tlv[conf_id])
3024                 return -EINVAL;
3025
3026         if (fwrt->dump.conf != FW_DBG_INVALID)
3027                 IWL_INFO(fwrt, "FW already configured (%d) - re-configuring\n",
3028                          fwrt->dump.conf);
3029
3030         /* Send all HCMDs for configuring the FW debug */
3031         ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
3032         for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
3033                 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
3034                 struct iwl_host_cmd hcmd = {
3035                         .id = cmd->id,
3036                         .len = { le16_to_cpu(cmd->len), },
3037                         .data = { cmd->data, },
3038                 };
3039
3040                 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3041                 if (ret)
3042                         return ret;
3043
3044                 ptr += sizeof(*cmd);
3045                 ptr += le16_to_cpu(cmd->len);
3046         }
3047
3048         fwrt->dump.conf = conf_id;
3049
3050         return 0;
3051 }
3052 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf);
3053
3054 void iwl_send_dbg_dump_complete_cmd(struct iwl_fw_runtime *fwrt,
3055                                     u32 timepoint,
3056                                     u32 timepoint_data)
3057 {
3058         struct iwl_dbg_dump_complete_cmd hcmd_data;
3059         struct iwl_host_cmd hcmd = {
3060                 .id = WIDE_ID(DEBUG_GROUP, FW_DUMP_COMPLETE_CMD),
3061                 .data[0] = &hcmd_data,
3062                 .len[0] = sizeof(hcmd_data),
3063         };
3064
3065         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
3066                 return;
3067
3068         if (fw_has_capa(&fwrt->fw->ucode_capa,
3069                         IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT)) {
3070                 hcmd_data.tp = cpu_to_le32(timepoint);
3071                 hcmd_data.tp_data = cpu_to_le32(timepoint_data);
3072                 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3073         }
3074 }
3075
3076 /* this function assumes dump_start was called beforehand and dump_end will be
3077  * called afterwards
3078  */
3079 static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx)
3080 {
3081         struct iwl_fw_dbg_params params = {0};
3082         struct iwl_fwrt_dump_data *dump_data =
3083                 &fwrt->dump.wks[wk_idx].dump_data;
3084         u32 policy;
3085         u32 time_point;
3086         if (!test_bit(wk_idx, &fwrt->dump.active_wks))
3087                 return;
3088
3089         if (!dump_data->trig) {
3090                 IWL_ERR(fwrt, "dump trigger data is not set\n");
3091                 goto out;
3092         }
3093
3094         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) {
3095                 IWL_ERR(fwrt, "Device is not enabled - cannot dump error\n");
3096                 goto out;
3097         }
3098
3099         /* there's no point in fw dump if the bus is dead */
3100         if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
3101                 IWL_ERR(fwrt, "Skip fw error dump since bus is dead\n");
3102                 goto out;
3103         }
3104
3105         iwl_fw_dbg_stop_restart_recording(fwrt, &params, true);
3106
3107         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection start\n");
3108         if (iwl_trans_dbg_ini_valid(fwrt->trans))
3109                 iwl_fw_error_ini_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
3110         else
3111                 iwl_fw_error_dump(fwrt, &fwrt->dump.wks[wk_idx].dump_data);
3112         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection done\n");
3113
3114         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
3115
3116         policy = le32_to_cpu(dump_data->trig->apply_policy);
3117         time_point = le32_to_cpu(dump_data->trig->time_point);
3118
3119         if (policy & IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD) {
3120                 IWL_DEBUG_FW_INFO(fwrt, "WRT: sending dump complete\n");
3121                 iwl_send_dbg_dump_complete_cmd(fwrt, time_point, 0);
3122         }
3123         if (fwrt->trans->dbg.last_tp_resetfw == IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY)
3124                 iwl_force_nmi(fwrt->trans);
3125
3126 out:
3127         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
3128                 iwl_fw_error_dump_data_free(dump_data);
3129         } else {
3130                 iwl_fw_free_dump_desc(fwrt, dump_data->desc);
3131                 dump_data->desc = NULL;
3132         }
3133
3134         clear_bit(wk_idx, &fwrt->dump.active_wks);
3135 }
3136
3137 int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt,
3138                            struct iwl_fwrt_dump_data *dump_data,
3139                            bool sync)
3140 {
3141         struct iwl_fw_ini_trigger_tlv *trig = dump_data->trig;
3142         enum iwl_fw_ini_time_point tp_id = le32_to_cpu(trig->time_point);
3143         u32 occur, delay;
3144         unsigned long idx;
3145
3146         if (!iwl_fw_ini_trigger_on(fwrt, trig)) {
3147                 IWL_WARN(fwrt, "WRT: Trigger %d is not active, aborting dump\n",
3148                          tp_id);
3149                 return -EINVAL;
3150         }
3151
3152         delay = le32_to_cpu(trig->dump_delay);
3153         occur = le32_to_cpu(trig->occurrences);
3154         if (!occur)
3155                 return 0;
3156
3157         trig->occurrences = cpu_to_le32(--occur);
3158
3159         /* Check there is an available worker.
3160          * ffz return value is undefined if no zero exists,
3161          * so check against ~0UL first.
3162          */
3163         if (fwrt->dump.active_wks == ~0UL)
3164                 return -EBUSY;
3165
3166         idx = ffz(fwrt->dump.active_wks);
3167
3168         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
3169             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
3170                 return -EBUSY;
3171
3172         fwrt->dump.wks[idx].dump_data = *dump_data;
3173
3174         if (sync)
3175                 delay = 0;
3176
3177         IWL_WARN(fwrt,
3178                  "WRT: Collecting data: ini trigger %d fired (delay=%dms).\n",
3179                  tp_id, (u32)(delay / USEC_PER_MSEC));
3180
3181         if (sync)
3182                 iwl_fw_dbg_collect_sync(fwrt, idx);
3183         else
3184                 queue_delayed_work(system_unbound_wq,
3185                                    &fwrt->dump.wks[idx].wk,
3186                                    usecs_to_jiffies(delay));
3187
3188         return 0;
3189 }
3190
3191 void iwl_fw_error_dump_wk(struct work_struct *work)
3192 {
3193         struct iwl_fwrt_wk_data *wks =
3194                 container_of(work, typeof(*wks), wk.work);
3195         struct iwl_fw_runtime *fwrt =
3196                 container_of(wks, typeof(*fwrt), dump.wks[wks->idx]);
3197
3198         /* assumes the op mode mutex is locked in dump_start since
3199          * iwl_fw_dbg_collect_sync can't run in parallel
3200          */
3201         if (fwrt->ops && fwrt->ops->dump_start)
3202                 fwrt->ops->dump_start(fwrt->ops_ctx);
3203
3204         iwl_fw_dbg_collect_sync(fwrt, wks->idx);
3205
3206         if (fwrt->ops && fwrt->ops->dump_end)
3207                 fwrt->ops->dump_end(fwrt->ops_ctx);
3208 }
3209
3210 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt)
3211 {
3212         const struct iwl_cfg *cfg = fwrt->trans->cfg;
3213
3214         if (!iwl_fw_dbg_is_d3_debug_enabled(fwrt))
3215                 return;
3216
3217         if (!fwrt->dump.d3_debug_data) {
3218                 fwrt->dump.d3_debug_data = kmalloc(cfg->d3_debug_data_length,
3219                                                    GFP_KERNEL);
3220                 if (!fwrt->dump.d3_debug_data) {
3221                         IWL_ERR(fwrt,
3222                                 "failed to allocate memory for D3 debug data\n");
3223                         return;
3224                 }
3225         }
3226
3227         /* if the buffer holds previous debug data it is overwritten */
3228         iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
3229                                  fwrt->dump.d3_debug_data,
3230                                  cfg->d3_debug_data_length);
3231
3232         if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_mem)
3233                 fwrt->sanitize_ops->frob_mem(fwrt->sanitize_ctx,
3234                                              cfg->d3_debug_data_base_addr,
3235                                              fwrt->dump.d3_debug_data,
3236                                              cfg->d3_debug_data_length);
3237 }
3238 IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data);
3239
3240 void iwl_fw_dbg_stop_sync(struct iwl_fw_runtime *fwrt)
3241 {
3242         int i;
3243
3244         iwl_dbg_tlv_del_timers(fwrt->trans);
3245         for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++)
3246                 iwl_fw_dbg_collect_sync(fwrt, i);
3247
3248         iwl_fw_dbg_stop_restart_recording(fwrt, NULL, true);
3249 }
3250 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_sync);
3251
3252 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans *trans, bool suspend)
3253 {
3254         struct iwl_dbg_suspend_resume_cmd cmd = {
3255                 .operation = suspend ?
3256                         cpu_to_le32(DBGC_SUSPEND_CMD) :
3257                         cpu_to_le32(DBGC_RESUME_CMD),
3258         };
3259         struct iwl_host_cmd hcmd = {
3260                 .id = WIDE_ID(DEBUG_GROUP, DBGC_SUSPEND_RESUME),
3261                 .data[0] = &cmd,
3262                 .len[0] = sizeof(cmd),
3263         };
3264
3265         return iwl_trans_send_cmd(trans, &hcmd);
3266 }
3267
3268 static void iwl_fw_dbg_stop_recording(struct iwl_trans *trans,
3269                                       struct iwl_fw_dbg_params *params)
3270 {
3271         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3272                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3273                 return;
3274         }
3275
3276         if (params) {
3277                 params->in_sample = iwl_read_umac_prph(trans, DBGC_IN_SAMPLE);
3278                 params->out_ctrl = iwl_read_umac_prph(trans, DBGC_OUT_CTRL);
3279         }
3280
3281         iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, 0);
3282         /* wait for the DBGC to finish writing the internal buffer to DRAM to
3283          * avoid halting the HW while writing
3284          */
3285         usleep_range(700, 1000);
3286         iwl_write_umac_prph(trans, DBGC_OUT_CTRL, 0);
3287 }
3288
3289 static int iwl_fw_dbg_restart_recording(struct iwl_trans *trans,
3290                                         struct iwl_fw_dbg_params *params)
3291 {
3292         if (!params)
3293                 return -EIO;
3294
3295         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
3296                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
3297                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3298                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
3299         } else {
3300                 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, params->in_sample);
3301                 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, params->out_ctrl);
3302         }
3303
3304         return 0;
3305 }
3306
3307 int iwl_fw_send_timestamp_marker_cmd(struct iwl_fw_runtime *fwrt)
3308 {
3309         struct iwl_mvm_marker marker = {
3310                 .dw_len = sizeof(struct iwl_mvm_marker) / 4,
3311                 .marker_id = MARKER_ID_SYNC_CLOCK,
3312         };
3313         struct iwl_host_cmd hcmd = {
3314                 .flags = CMD_ASYNC,
3315                 .id = WIDE_ID(LONG_GROUP, MARKER_CMD),
3316                 .dataflags = {},
3317         };
3318         struct iwl_mvm_marker_rsp *resp;
3319         int cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
3320                                             WIDE_ID(LONG_GROUP, MARKER_CMD),
3321                                             IWL_FW_CMD_VER_UNKNOWN);
3322         int ret;
3323
3324         if (cmd_ver == 1) {
3325                 /* the real timestamp is taken from the ftrace clock
3326                  * this is for finding the match between fw and kernel logs
3327                  */
3328                 marker.timestamp = cpu_to_le64(fwrt->timestamp.seq++);
3329         } else if (cmd_ver == 2) {
3330                 marker.timestamp = cpu_to_le64(ktime_get_boottime_ns());
3331         } else {
3332                 IWL_DEBUG_INFO(fwrt,
3333                                "Invalid version of Marker CMD. Ver = %d\n",
3334                                cmd_ver);
3335                 return -EINVAL;
3336         }
3337
3338         hcmd.data[0] = &marker;
3339         hcmd.len[0] = sizeof(marker);
3340
3341         ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
3342
3343         if (cmd_ver > 1 && hcmd.resp_pkt) {
3344                 resp = (void *)hcmd.resp_pkt->data;
3345                 IWL_DEBUG_INFO(fwrt, "FW GP2 time: %u\n",
3346                                le32_to_cpu(resp->gp2));
3347         }
3348
3349         return ret;
3350 }
3351
3352 void iwl_fw_dbg_stop_restart_recording(struct iwl_fw_runtime *fwrt,
3353                                        struct iwl_fw_dbg_params *params,
3354                                        bool stop)
3355 {
3356         int ret __maybe_unused = 0;
3357
3358         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
3359                 return;
3360
3361         if (fw_has_capa(&fwrt->fw->ucode_capa,
3362                         IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP)) {
3363                 if (stop)
3364                         iwl_fw_send_timestamp_marker_cmd(fwrt);
3365                 ret = iwl_fw_dbg_suspend_resume_hcmd(fwrt->trans, stop);
3366         } else if (stop) {
3367                 iwl_fw_dbg_stop_recording(fwrt->trans, params);
3368         } else {
3369                 ret = iwl_fw_dbg_restart_recording(fwrt->trans, params);
3370         }
3371 #ifdef CONFIG_IWLWIFI_DEBUGFS
3372         if (!ret) {
3373                 if (stop)
3374                         fwrt->trans->dbg.rec_on = false;
3375                 else
3376                         iwl_fw_set_dbg_rec_on(fwrt);
3377         }
3378 #endif
3379 }
3380 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_restart_recording);
3381
3382 void iwl_fw_disable_dbg_asserts(struct iwl_fw_runtime *fwrt)
3383 {
3384         struct iwl_fw_dbg_config_cmd cmd = {
3385                 .type = cpu_to_le32(DEBUG_TOKEN_CONFIG_TYPE),
3386                 .conf = cpu_to_le32(IWL_FW_DBG_CONFIG_TOKEN),
3387         };
3388         struct iwl_host_cmd hcmd = {
3389                 .id = WIDE_ID(LONG_GROUP, LDBG_CONFIG_CMD),
3390                 .data[0] = &cmd,
3391                 .len[0] = sizeof(cmd),
3392         };
3393         u32 preset = u32_get_bits(fwrt->trans->dbg.domains_bitmap,
3394                                   GENMASK(31, IWL_FW_DBG_DOMAIN_POS + 1));
3395
3396         /* supported starting from 9000 devices */
3397         if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_9000)
3398                 return;
3399
3400         if (fwrt->trans->dbg.yoyo_bin_loaded || (preset && preset != 1))
3401                 return;
3402
3403         iwl_trans_send_cmd(fwrt->trans, &hcmd);
3404 }
3405 IWL_EXPORT_SYMBOL(iwl_fw_disable_dbg_asserts);
3406
3407 void iwl_fw_dbg_clear_monitor_buf(struct iwl_fw_runtime *fwrt)
3408 {
3409         struct iwl_fw_dbg_params params = {0};
3410
3411         iwl_fw_dbg_stop_sync(fwrt);
3412
3413         if (fw_has_api(&fwrt->fw->ucode_capa,
3414                        IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR)) {
3415                 struct iwl_host_cmd hcmd = {
3416                         .id = WIDE_ID(DEBUG_GROUP, FW_CLEAR_BUFFER),
3417                 };
3418                 iwl_trans_send_cmd(fwrt->trans, &hcmd);
3419         }
3420
3421         iwl_dbg_tlv_init_cfg(fwrt);
3422         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
3423 }
3424 IWL_EXPORT_SYMBOL(iwl_fw_dbg_clear_monitor_buf);