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24 #ifndef __SMU_V14_0_0_PMFW_H__
25 #define __SMU_V14_0_0_PMFW_H__
27 #include "smu14_driver_if_v14_0_0.h"
31 #define ENABLE_DEBUG_FEATURES
34 // Feature Control Defines
35 #define FEATURE_CCLK_DPM_BIT 0
36 #define FEATURE_FAN_CONTROLLER_BIT 1
37 #define FEATURE_DATA_CALCULATION_BIT 2
38 #define FEATURE_PPT_BIT 3
39 #define FEATURE_TDC_BIT 4
40 #define FEATURE_THERMAL_BIT 5
41 #define FEATURE_FIT_BIT 6
42 #define FEATURE_EDC_BIT 7
43 #define FEATURE_PLL_POWER_DOWN_BIT 8
44 #define FEATURE_VDDOFF_BIT 9
45 #define FEATURE_VCN_DPM_BIT 10
46 #define FEATURE_DS_MPM_BIT 11
47 #define FEATURE_FCLK_DPM_BIT 12
48 #define FEATURE_SOCCLK_DPM_BIT 13
49 #define FEATURE_DS_MPIO_BIT 14
50 #define FEATURE_LCLK_DPM_BIT 15
51 #define FEATURE_SHUBCLK_DPM_BIT 16
52 #define FEATURE_DCFCLK_DPM_BIT 17
53 #define FEATURE_ISP_DPM_BIT 18
54 #define FEATURE_IPU_DPM_BIT 19
55 #define FEATURE_GFX_DPM_BIT 20
56 #define FEATURE_DS_GFXCLK_BIT 21
57 #define FEATURE_DS_SOCCLK_BIT 22
58 #define FEATURE_DS_LCLK_BIT 23
59 #define FEATURE_LOW_POWER_DCNCLKS_BIT 24 // for all DISP clks
60 #define FEATURE_DS_SHUBCLK_BIT 25
61 #define FEATURE_SPARE0_BIT 26 //SPARE
62 #define FEATURE_ZSTATES_BIT 27
63 #define FEATURE_IOMMUL2_PG_BIT 28
64 #define FEATURE_DS_FCLK_BIT 29
65 #define FEATURE_DS_SMNCLK_BIT 30
66 #define FEATURE_DS_MP1CLK_BIT 31
67 #define FEATURE_WHISPER_MODE_BIT 32
68 #define FEATURE_SMU_LOW_POWER_BIT 33
69 #define FEATURE_SMART_L3_RINSER_BIT 34
70 #define FEATURE_SPARE1_BIT 35 //SPARE
71 #define FEATURE_PSI_BIT 36
72 #define FEATURE_PROCHOT_BIT 37
73 #define FEATURE_CPUOFF_BIT 38
74 #define FEATURE_STAPM_BIT 39
75 #define FEATURE_S0I3_BIT 40
76 #define FEATURE_DF_LIGHT_CSTATE 41
77 #define FEATURE_PERF_LIMIT_BIT 42
78 #define FEATURE_CORE_DLDO_BIT 43
79 #define FEATURE_DVO_BIT 44
80 #define FEATURE_DS_VCN_BIT 45
81 #define FEATURE_CPPC_BIT 46
82 #define FEATURE_CPPC_PREFERRED_CORES 47
83 #define FEATURE_DF_CSTATES_BIT 48
84 #define FEATURE_SPARE2_BIT 49 //SPARE
85 #define FEATURE_ATHUB_PG_BIT 50
86 #define FEATURE_VDDOFF_ECO_BIT 51
87 #define FEATURE_ZSTATES_ECO_BIT 52
88 #define FEATURE_CC6_BIT 53
89 #define FEATURE_DS_UMCCLK_BIT 54
90 #define FEATURE_DS_ISPCLK_BIT 55
91 #define FEATURE_DS_HSPCLK_BIT 56
92 #define FEATURE_P3T_BIT 57
93 #define FEATURE_DS_IPUCLK_BIT 58
94 #define FEATURE_DS_VPECLK_BIT 59
95 #define FEATURE_VPE_DPM_BIT 60
96 #define FEATURE_SPARE_61 61
97 #define FEATURE_FP_DIDT 62
98 #define NUM_FEATURES 63
100 // Firmware Header/Footer
101 struct SMU14_Firmware_Footer {
104 typedef struct SMU14_Firmware_Footer SMU14_Firmware_Footer;
106 // PSP3.0 Header Definition
108 uint32_t ImageVersion;
109 uint32_t ImageVersion2; // This is repeated because DW0 cannot be written in SRAM due to HW bug.
110 uint32_t Padding0[3];
111 uint32_t SizeFWSigned;
112 uint32_t Padding1[25];
113 uint32_t FirmwareType;
115 } SMU_Firmware_Header;
119 uint32_t DpmHandlerID : 8;
120 uint32_t ActivityMonitorID : 8;
121 uint32_t DpmTimerID : 8;
122 uint32_t DpmHubID : 4;
123 uint32_t DpmHubTask : 4;
125 uint32_t CclkSyncStatus : 8;
126 uint32_t Ccx0CpuOff : 2;
127 uint32_t Ccx1CpuOff : 2;
128 uint32_t GfxOffStatus : 2;
130 uint32_t InWhisperMode : 1;
131 uint32_t ZstateStatus : 4;
133 uint32_t DstateFun : 4;
134 uint32_t DstateDev : 4;
136 uint32_t P2JobHandler :24;
137 uint32_t RsmuPmiP2PendingCnt : 8;
139 uint32_t PostCode :32;
141 uint32_t MsgPortBusy :24;
142 uint32_t RsmuPmiP1Pending : 1;
143 uint32_t DfCstateExitPending : 1;
144 uint32_t Ccx0Pc6ExitPending : 1;
145 uint32_t Ccx1Pc6ExitPending : 1;
146 uint32_t WarmResetPending : 1;
149 uint32_t IdleMask :32;
150 // MP1_EXT_SCRATCH6 = RTOS threads' status
151 // MP1_EXT_SCRATCH7 = RTOS Current Job